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[DA] remove wrap-around check from affine definition (#116632)
Fix #51512 by reverting a part of commit c0661ae that modified the definition affine subscripts.
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2 files changed

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Diff for: llvm/lib/Analysis/DependenceAnalysis.cpp

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Original file line numberDiff line numberDiff line change
@@ -981,14 +981,6 @@ bool DependenceInfo::checkSubscript(const SCEV *Expr, const Loop *LoopNest,
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const SCEV *Start = AddRec->getStart();
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const SCEV *Step = AddRec->getStepRecurrence(*SE);
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const SCEV *UB = SE->getBackedgeTakenCount(AddRec->getLoop());
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if (!isa<SCEVCouldNotCompute>(UB)) {
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if (SE->getTypeSizeInBits(Start->getType()) <
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SE->getTypeSizeInBits(UB->getType())) {
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if (!AddRec->getNoWrapFlags())
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return false;
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}
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}
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if (!isLoopInvariant(Step, LoopNest))
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return false;
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if (IsSrc)

Diff for: llvm/test/Analysis/DependenceAnalysis/PR51512.ll

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,44 @@
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -disable-output "-passes=print<da>" -aa-pipeline=basic-aa 2>&1 \
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; RUN: | FileCheck %s
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; Check that the testcase does not crash the compiler.
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; See https://github.com/llvm/llvm-project/issues/51512 for details.
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define void @foo() {
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; CHECK-LABEL: 'foo'
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; CHECK-NEXT: Src: store i32 42, ptr %getelementptr, align 1 --> Dst: store i32 42, ptr %getelementptr, align 1
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; CHECK-NEXT: da analyze - consistent output [0 S]!
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; CHECK-NEXT: Src: store i32 42, ptr %getelementptr, align 1 --> Dst: store i32 0, ptr %getelementptr5, align 1
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; CHECK-NEXT: da analyze - output [0 *|<]!
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; CHECK-NEXT: Src: store i32 0, ptr %getelementptr5, align 1 --> Dst: store i32 0, ptr %getelementptr5, align 1
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; CHECK-NEXT: da analyze - none!
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;
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bb:
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%alloca = alloca [2 x [5 x i32]], align 1
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br label %outerloop.header
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outerloop.header: ; preds = %outerloop.latch, %bb
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%iv.outerloop = phi i32 [ 0, %bb ], [ %iv.outerloop.next, %outerloop.latch ]
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%trunc = trunc i32 %iv.outerloop to i16
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%add = add i16 %trunc, 3
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%getelementptr = getelementptr inbounds [2 x [5 x i32]], ptr %alloca, i16 0, i16 %trunc, i16 %add
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br label %innerloop
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innerloop: ; preds = %innerloop, %outerloop.header
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%iv.innerloop = phi i32 [ 0, %outerloop.header ], [ %iv.innerloop.next, %innerloop ]
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store i32 42, ptr %getelementptr, align 1
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%trunc4 = trunc i32 %iv.innerloop to i16
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%getelementptr5 = getelementptr inbounds [2 x [5 x i32]], ptr %alloca, i16 0, i16 %trunc4, i16 %add
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store i32 0, ptr %getelementptr5, align 1
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%iv.innerloop.next = add nuw nsw i32 %iv.innerloop, 1
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br i1 false, label %innerloop, label %outerloop.latch
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outerloop.latch: ; preds = %innerloop
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%iv.outerloop.next = add nuw nsw i32 %iv.outerloop, 1
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%icmp = icmp eq i32 %iv.outerloop, 0
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br i1 %icmp, label %outerloop.header, label %bb9
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bb9: ; preds = %outerloop.latch
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ret void
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}

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