From e20a7428f12b94fc187f5f7d319514092f58f5a5 Mon Sep 17 00:00:00 2001 From: Sebastian Pop Date: Fri, 15 Nov 2024 01:04:58 +0000 Subject: [PATCH] [DA] remove wrap-around check from affine definition Fix https://github.com/llvm/llvm-project/issues/51512 by reverting a part of commit https://github.com/llvm/llvm-project/commit/c0661aeaf8daf371023cf5669be4bd9b428882d0 that modified the definition affine subscripts. --- llvm/lib/Analysis/DependenceAnalysis.cpp | 8 ---- .../Analysis/DependenceAnalysis/PR51512.ll | 44 +++++++++++++++++++ 2 files changed, 44 insertions(+), 8 deletions(-) create mode 100644 llvm/test/Analysis/DependenceAnalysis/PR51512.ll diff --git a/llvm/lib/Analysis/DependenceAnalysis.cpp b/llvm/lib/Analysis/DependenceAnalysis.cpp index cd252c62ba9cd..dc0ed22dbcc0b 100644 --- a/llvm/lib/Analysis/DependenceAnalysis.cpp +++ b/llvm/lib/Analysis/DependenceAnalysis.cpp @@ -981,14 +981,6 @@ bool DependenceInfo::checkSubscript(const SCEV *Expr, const Loop *LoopNest, const SCEV *Start = AddRec->getStart(); const SCEV *Step = AddRec->getStepRecurrence(*SE); - const SCEV *UB = SE->getBackedgeTakenCount(AddRec->getLoop()); - if (!isa(UB)) { - if (SE->getTypeSizeInBits(Start->getType()) < - SE->getTypeSizeInBits(UB->getType())) { - if (!AddRec->getNoWrapFlags()) - return false; - } - } if (!isLoopInvariant(Step, LoopNest)) return false; if (IsSrc) diff --git a/llvm/test/Analysis/DependenceAnalysis/PR51512.ll b/llvm/test/Analysis/DependenceAnalysis/PR51512.ll new file mode 100644 index 0000000000000..9bee38c6c00ef --- /dev/null +++ b/llvm/test/Analysis/DependenceAnalysis/PR51512.ll @@ -0,0 +1,44 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5 +; RUN: opt < %s -disable-output "-passes=print" -aa-pipeline=basic-aa 2>&1 \ +; RUN: | FileCheck %s + +; Check that the testcase does not crash the compiler. +; See https://github.com/llvm/llvm-project/issues/51512 for details. + +define void @foo() { +; CHECK-LABEL: 'foo' +; CHECK-NEXT: Src: store i32 42, ptr %getelementptr, align 1 --> Dst: store i32 42, ptr %getelementptr, align 1 +; CHECK-NEXT: da analyze - consistent output [0 S]! +; CHECK-NEXT: Src: store i32 42, ptr %getelementptr, align 1 --> Dst: store i32 0, ptr %getelementptr5, align 1 +; CHECK-NEXT: da analyze - output [0 *|<]! +; CHECK-NEXT: Src: store i32 0, ptr %getelementptr5, align 1 --> Dst: store i32 0, ptr %getelementptr5, align 1 +; CHECK-NEXT: da analyze - none! +; +bb: + %alloca = alloca [2 x [5 x i32]], align 1 + br label %outerloop.header + +outerloop.header: ; preds = %outerloop.latch, %bb + %iv.outerloop = phi i32 [ 0, %bb ], [ %iv.outerloop.next, %outerloop.latch ] + %trunc = trunc i32 %iv.outerloop to i16 + %add = add i16 %trunc, 3 + %getelementptr = getelementptr inbounds [2 x [5 x i32]], ptr %alloca, i16 0, i16 %trunc, i16 %add + br label %innerloop + +innerloop: ; preds = %innerloop, %outerloop.header + %iv.innerloop = phi i32 [ 0, %outerloop.header ], [ %iv.innerloop.next, %innerloop ] + store i32 42, ptr %getelementptr, align 1 + %trunc4 = trunc i32 %iv.innerloop to i16 + %getelementptr5 = getelementptr inbounds [2 x [5 x i32]], ptr %alloca, i16 0, i16 %trunc4, i16 %add + store i32 0, ptr %getelementptr5, align 1 + %iv.innerloop.next = add nuw nsw i32 %iv.innerloop, 1 + br i1 false, label %innerloop, label %outerloop.latch + +outerloop.latch: ; preds = %innerloop + %iv.outerloop.next = add nuw nsw i32 %iv.outerloop, 1 + %icmp = icmp eq i32 %iv.outerloop, 0 + br i1 %icmp, label %outerloop.header, label %bb9 + +bb9: ; preds = %outerloop.latch + ret void +}