Skip to content

Commit a4f2484

Browse files
hshosehshose
committed
[f469disco] hardware rev b08 / driver nt35510 wip
1 parent 94580b4 commit a4f2484

File tree

7 files changed

+609
-10
lines changed

7 files changed

+609
-10
lines changed

‎src/modm/board/disco_f469ni/board.cpp

+47
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
/*
2+
* Copyright (c) 2016-2017, Niklas Hauser
3+
*
4+
* This file is part of the modm project.
5+
*
6+
* This Source Code Form is subject to the terms of the Mozilla Public
7+
* License, v. 2.0. If a copy of the MPL was not distributed with this
8+
* file, You can obtain one at http://mozilla.org/MPL/2.0/.
9+
*/
10+
// ----------------------------------------------------------------------------
11+
12+
#include "board.hpp"
13+
#include <modm/architecture/interface/delay.hpp>
14+
#include <modm/architecture/interface/assert.hpp>
15+
Board::LoggerDevice loggerDevice;
16+
17+
// Set all four logger streams to use the UART
18+
modm::log::Logger modm::log::debug(loggerDevice);
19+
modm::log::Logger modm::log::info(loggerDevice);
20+
modm::log::Logger modm::log::warning(loggerDevice);
21+
modm::log::Logger modm::log::error(loggerDevice);
22+
modm_extern_c void
23+
modm_abandon(const modm::AssertionInfo &info)
24+
{
25+
MODM_LOG_ERROR << "Assertion '" << info.name << "'";
26+
if (info.context != uintptr_t(-1)) {
27+
MODM_LOG_ERROR << " @ " << (void *) info.context <<
28+
" (" << (uint32_t) info.context << ")";
29+
}
30+
#if MODM_ASSERTION_INFO_HAS_DESCRIPTION
31+
MODM_LOG_ERROR << " failed!\n " << info.description << "\nAbandoning...\n";
32+
#else
33+
MODM_LOG_ERROR << " failed!\nAbandoning...\n";
34+
#endif
35+
Board::Leds::setOutput();
36+
for(int times=10; times>=0; times--)
37+
{
38+
Board::Leds::write(1);
39+
modm::delay_ms(20);
40+
Board::Leds::write(0);
41+
modm::delay_ms(180);
42+
}
43+
// Do not flush here otherwise you may deadlock due to waiting on the UART
44+
// interrupt which may never be executed when abandoning in a higher
45+
// priority Interrupt!!!
46+
// MODM_LOG_ERROR << modm::flush;
47+
}

‎src/modm/board/disco_f469ni/board_display.cpp

+3-3
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@
1515
#include <algorithm>
1616

1717
extern void
18-
board_initialize_display(uint8_t);
18+
board_initialize_display_nt35510(uint8_t);
1919

2020
// Basic implementation of display running on memory mapped buffer
2121
class DsiDisplay : public modm::ColorGraphicDisplay
@@ -86,14 +86,14 @@ class DsiDisplay : public modm::ColorGraphicDisplay
8686
void
8787
Board::initializeDisplay()
8888
{
89-
board_initialize_display(2);
89+
board_initialize_display_nt35510(2);
9090
}
9191

9292
void
9393
Board::setDisplayBuffer(void * buffer)
9494
{
9595
// ColorCoding: 0 = ARGB8888, 2 = RGB565
96-
board_initialize_display(2);
96+
board_initialize_display_nt35510(2);
9797
// Configures the color frame buffer start address
9898
LTDC_Layer1->CFBAR = uint32_t(buffer);
9999
// Enable LTDC_Layer by setting LEN bit

‎src/modm/board/disco_f469ni/board_dsi_nt35510.cpp

+190
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,190 @@
1+
/*
2+
* Copyright (c) 2016-2017, Niklas Hauser
3+
*
4+
* This file is part of the modm project.
5+
*
6+
* This Source Code Form is subject to the terms of the Mozilla Public
7+
* License, v. 2.0. If a copy of the MPL was not distributed with this
8+
* file, You can obtain one at http://mozilla.org/MPL/2.0/.
9+
*/
10+
// ----------------------------------------------------------------------------
11+
12+
#include <modm/board.hpp>
13+
#include <modm/platform/clock/rcc.hpp>
14+
15+
extern void
16+
nt35510_init(uint8_t);
17+
18+
// ---------------------------------- DISPLAY ----------------------------------
19+
void
20+
board_initialize_display_nt35510(uint8_t ColorCoding)
21+
{
22+
using namespace modm::platform;
23+
if (Rcc::isEnabled<Peripheral::Ltdc>()) return;
24+
// Enable clock to LTDC, DSI interface
25+
Rcc::enable<Peripheral::Ltdc>();
26+
Rcc::enable<Peripheral::Dsihost>();
27+
28+
{
29+
// Expanded `HAL_DSI_Init()`:
30+
// Enable regulator
31+
DSI->WRPCR = DSI_WRPCR_REGEN;
32+
// Wait until stable
33+
for (int t = 1'024; not (DSI->WISR & DSI_WISR_RRS) and t; t--) {
34+
modm::delay_ms(1);
35+
}
36+
// Set up PLL and enable it
37+
DSI->WRPCR |= (0 << 16) | (2 << 11) | (125 << 2) | DSI_WRPCR_PLLEN;
38+
// Wait until stable
39+
for (int t = 1'024; not (DSI->WISR & DSI_WISR_PLLLS) and t; t--) {
40+
modm::delay_ms(1);
41+
}
42+
// D-PHY clock and digital enable
43+
DSI->PCTLR = DSI_PCTLR_CKE | DSI_PCTLR_DEN;
44+
// Clock lane configuration
45+
DSI->CLCR = DSI_CLCR_DPCC;
46+
// Configure the number of active data lanes
47+
DSI->PCONFR = 1;
48+
// Set the TX escape clock division factor
49+
DSI->CCR = 4;
50+
// Calculate the bit period in high-speed mode in unit of 0.25 ns (UIX4)
51+
// The equation is : UIX4 = IntegerPart( (1000/F_PHY_Mhz) * 4 )
52+
// Where : F_PHY_Mhz = (NDIV * HSE_Mhz) / (IDF * ODF)
53+
// Set the bit period in high-speed mode
54+
DSI->WPCR[0] = 8;
55+
// Disable all error interrupts and reset the Error Mask
56+
DSI->IER[0] = 0;
57+
DSI->IER[1] = 0;
58+
}
59+
60+
constexpr uint32_t VSA = 2;
61+
constexpr uint32_t VBP = 34;
62+
constexpr uint32_t VFP = 34;
63+
64+
constexpr uint32_t HSA = 120;
65+
constexpr uint32_t HBP = 150;
66+
constexpr uint32_t HFP = 150;
67+
68+
constexpr uint32_t HACT = 800;
69+
constexpr uint32_t VACT = 480;
70+
const uint8_t pixel_size = (ColorCoding == 0) ? sizeof(uint32_t) : sizeof(uint16_t);
71+
constexpr float ClockRatio = 62500.f / 27429;
72+
73+
{
74+
// Expanded `HAL_DSI_ConfigVideoMode()`
75+
// Select video mode by resetting CMDM and DSIM bits
76+
DSI->MCR = 0;
77+
DSI->WCFGR = 0;
78+
// Configure the video mode transmission type
79+
DSI->VMCR = 2;
80+
// Configure the video packet size
81+
DSI->VPCR = HACT;
82+
// Set the chunks number to be transmitted through the DSI link
83+
DSI->VCCR = 0;
84+
// Set the size of the null packet
85+
DSI->VNPCR = 0xFFF;
86+
// Select the virtual channel for the LTDC interface traffic
87+
DSI->LVCIDR = 0;
88+
// Configure the polarity of control signals
89+
DSI->LPCR = 0;
90+
// Select the color coding for the host
91+
DSI->LCOLCR = ColorCoding;
92+
// Select the color coding for the wrapper
93+
DSI->WCFGR = ColorCoding << 1;
94+
// Set the Horizontal Synchronization Active (HSA) in lane byte clock cycles
95+
DSI->VHSACR = HSA * ClockRatio;
96+
// Set the Horizontal Back Porch (HBP) in lane byte clock cycles
97+
DSI->VHBPCR = HBP * ClockRatio;
98+
// Set the total line time (HLINE=HSA+HBP+HACT+HFP) in lane byte clock cycles
99+
DSI->VLCR = (HACT + HSA + HBP + HFP) * ClockRatio;
100+
// Set the Vertical Synchronization Active (VSA)
101+
DSI->VVSACR = VSA;
102+
// Set the Vertical Back Porch (VBP)
103+
DSI->VVBPCR = VBP;
104+
// Set the Vertical Front Porch (VFP)
105+
DSI->VVFPCR = VFP;
106+
// Set the Vertical Active period
107+
DSI->VVACR = VACT;
108+
// Low power largest packet size
109+
// Low power VACT largest packet size
110+
DSI->LPMCR = (64 << 16) | 64;
111+
// Configure the command transmission mode
112+
// Enable LP transition in HFP period
113+
// Enable LP transition in HBP period
114+
DSI->VMCR |= DSI_VMCR_LPCE | DSI_VMCR_LPHFPE | DSI_VMCR_LPHBPE | DSI_VMCR_LPVAE |
115+
DSI_VMCR_LPVFPE | DSI_VMCR_LPVBPE | DSI_VMCR_LPVSAE;
116+
}
117+
{
118+
// Enable the DSI host
119+
DSI->CR = DSI_CR_EN;
120+
// Enable the DSI wrapper
121+
DSI->WCR = DSI_WCR_DSIEN;
122+
}
123+
124+
/* done by SystemClock::enable()
125+
{
126+
// LCD clock configuration
127+
// PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz
128+
// PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 384 Mhz
129+
// PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 384 MHz / 7 = 54.857 MHz
130+
// LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_2 = 54.857 MHz / 2 = 27.429 MHz
131+
RCC->PLLSAICFGR = (7 << 28) | (15 << 24) | (3 << 16) | (384 << 6);
132+
// Select PLLSAI clock for 48MHz clocks
133+
RCC->DCKCFGR = RCC_DCKCFGR_CK48MSEL;
134+
// Enable PLLSAI
135+
RCC->CR |= RCC_CR_PLLSAION;
136+
for (int t = 1'024; not (RCC->CR & RCC_CR_PLLSAIRDY) and t; t--) {
137+
modm::delay_ms(1);
138+
}
139+
}
140+
*/
141+
142+
{
143+
// HAL_LTDC_Init(&hltdc_eval);
144+
// Configures the HS, VS, DE and PC polarity
145+
LTDC->GCR = 0;
146+
// Sets Synchronization size
147+
LTDC->SSCR = ((HSA - 1) << 16) | (VSA - 1);
148+
// Sets Accumulated Back porch
149+
LTDC->BPCR = ((HSA + HBP - 1) << 16) | (VSA + VBP - 1);
150+
// Sets Accumulated Active Width
151+
LTDC->AWCR = ((HACT + HSA + HBP - 1) << 16) | (VACT + VSA + VBP - 1);
152+
// Sets Total Width and Height
153+
LTDC->TWCR = ((HACT + HSA + HBP + HFP - 1) << 16) | (VACT + VSA + VBP + VFP - 1);
154+
// Sets the background color value
155+
LTDC->BCCR = 0;
156+
// Enable LTDC by setting LTDCEN bit
157+
LTDC->GCR |= LTDC_GCR_LTDCEN;
158+
}
159+
160+
nt35510_init(ColorCoding);
161+
162+
{
163+
// HAL_LTDC_ConfigLayer()
164+
// Configures the horizontal start and stop position
165+
LTDC_Layer1->WHPCR = ((HACT + HSA + HBP - 1) << 16) | (HSA + HBP);
166+
// Configures the vertical start and stop position
167+
LTDC_Layer1->WVPCR = ((VACT + VSA + VBP - 1) << 16) | (VSA + VBP);
168+
// Specifies the pixel format
169+
LTDC_Layer1->PFCR = ColorCoding;
170+
// Configures the default color values
171+
LTDC_Layer1->DCCR = 0xff000000;
172+
// Specifies the constant alpha value
173+
LTDC_Layer1->CACR = 0xff;
174+
// Specifies the blending factors
175+
LTDC_Layer1->BFCR = 0x607;
176+
// Configures the color frame buffer pitch in byte
177+
LTDC_Layer1->CFBLR = ((HACT * pixel_size) << 16) | ((HACT * pixel_size) + 3);
178+
// Configures the frame buffer line number
179+
LTDC_Layer1->CFBLNR = VACT;
180+
181+
/* Configured in display.cpp
182+
// Configures the color frame buffer start address
183+
LTDC_Layer1->CFBAR = buffer_address;
184+
// Enable LTDC_Layer by setting LEN bit
185+
LTDC_Layer1->CR = LTDC_LxCR_LEN;
186+
// Sets the Reload type
187+
LTDC->SRCR = LTDC_SRCR_IMR;
188+
*/
189+
}
190+
}

‎src/modm/board/disco_f469ni/board_dsi.cpp renamed to ‎src/modm/board/disco_f469ni/board_dsi_otm8009a.cpp

+5-5
Original file line numberDiff line numberDiff line change
@@ -57,12 +57,12 @@ board_initialize_display(uint8_t ColorCoding)
5757
DSI->IER[1] = 0;
5858
}
5959

60-
constexpr uint32_t VSA = 12;
61-
constexpr uint32_t VBP = 12;
60+
constexpr uint32_t VSA = 240;
61+
constexpr uint32_t VBP = 255;
6262
constexpr uint32_t VFP = 12;
63-
constexpr uint32_t HSA = 120;
64-
constexpr uint32_t HBP = 120;
65-
constexpr uint32_t HFP = 120;
63+
constexpr uint32_t HSA = 800;
64+
constexpr uint32_t HBP = 12;
65+
constexpr uint32_t HFP = 12;
6666
constexpr uint32_t HACT = 800;
6767
constexpr uint32_t VACT = 480;
6868
const uint8_t pixel_size = (ColorCoding == 0) ? sizeof(uint32_t) : sizeof(uint16_t);

‎src/modm/board/disco_f469ni/board_init.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ void
1818
modm_board_init(void)
1919
{
2020
// Reset LCD
21+
Board::DisplayReset::setOutput(Gpio::OutputType::PushPull, Gpio::OutputSpeed::High);
2122
Board::DisplayReset::setOutput(modm::Gpio::Low);
2223
modm::delay_ms(20);
2324
Board::DisplayReset::set();

0 commit comments

Comments
 (0)