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[nrf toup] soc: add ironside boot report
Signed-off-by: Håkon Amundsen <[email protected]>
1 parent 749f6b5 commit 233d4c6

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7 files changed

+164
-6
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7 files changed

+164
-6
lines changed

‎boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_iron.dts

Lines changed: 40 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,18 @@
66

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#include "nrf54h20dk_nrf54h20_cpuapp.dts"
88

9-
/delete-node/&cpurad_rx_partitions;
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/* The code partitions are re-defined below, so delete the parent node. */
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/delete-node/&cpuapp_rx_partitions;
1111

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/* No radio support for IRON variant, don't allocate MRAM. */
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/delete-node/&cpurad_rx_partitions;
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/* All of ram0x goes to cpuapp, delete these nodes to re-define below. */
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/delete-node/&cpuapp_ram0x_region;
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/delete-node/&cpurad_ram0x_region;
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/* IPC mechanism for IRON variant differs, delete the old node. */
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/* This is not yet an exhaustive memory map, and contain only a minimum required to boot
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* the application core.
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*/
@@ -21,15 +30,40 @@
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#size-cells = <1>;
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cpuapp_slot0_partition: partition@2c000 {
24-
reg = <0x2c000 DT_SIZE_K(480)>;
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reg = <0x2c000 DT_SIZE_K(736)>;
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};
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cpuppr_code_partition: partition@e4000 {
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reg = <0xe4000 DT_SIZE_K(64)>;
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};
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cpuflpr_code_partition: partition@f4000 {
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reg = <0xf4000 DT_SIZE_K(48)>;
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};
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};
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};
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/ {
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reserved-memory {
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cpuapp_ram0x_region: memory@2f000000 {
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compatible = "nordic,owned-memory", "fixed-partitions";
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nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RWS>;
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reg = <0x2f000000 DT_SIZE_K(768)>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x2f000000 0xc0000>;
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cpuapp_data: memory@0{
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reg = <0x0 DT_SIZE_K(768)>;
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};
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};
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27-
cpuppr_code_partition: partition@a4000 {
28-
reg = <0xa4000 DT_SIZE_K(64)>;
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sysctrl_rom_report: memory@2f88ff00 {
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reg = <0x2f88ff00 0x100>;
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};
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31-
cpuflpr_code_partition: partition@b4000 {
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reg = <0xb4000 DT_SIZE_K(48)>;
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cpuapp_ironside_se_boot_report: memory@2f88fd00 {
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reg = <0x2f88fd00 0x200>;
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};
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};
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};

‎soc/nordic/nrf54h/CMakeLists.txt

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Original file line numberDiff line numberDiff line change
@@ -18,3 +18,4 @@ zephyr_linker_sources(SECTIONS SORT_KEY zzz_place_align_at_end align.ld)
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add_subdirectory(bicr)
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add_subdirectory(gpd)
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add_subdirectory(ironside_se)

‎soc/nordic/nrf54h/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -74,3 +74,4 @@ config SOC_NRF54H20_CPUFLPR
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rsource "bicr/Kconfig"
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rsource "gpd/Kconfig"
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rsource "ironside_se/Kconfig"

‎soc/nordic/nrf54h/ironside_se/CMakeLists.txt

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@@ -0,0 +1,5 @@
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# Copyright (c) 2025 Nordic Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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zephyr_library_sources_ifdef(CONFIG_SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT ironside_se_boot_report.c)
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zephyr_include_directories(include)

‎soc/nordic/nrf54h/ironside_se/Kconfig

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@@ -0,0 +1,27 @@
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# Copyright (c) 2025 Nordic Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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config SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT
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bool "Nordic IRONside SE boot report"
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default y if SOC_NRF54H20_CPUAPP
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depends on SOC_NRF54H20_IRON
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help
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This option enables parsing of the Boot Report populated by Nordic IRONside SE.
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config SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_MAGIC
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hex
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default 0x4d69546f
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help
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Constant used to check if an Nordic IRONside SE boot report has been written.
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config SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_LOCAL_DOMAIN_CONTEXT_SIZE
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int
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default 32
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help
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Size of the local domain context in bytes
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config SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_RANDOM_DATA_SIZE
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int
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default 32
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help
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Size of the random data in bytes

‎soc/nordic/nrf54h/ironside_se/include/nrf/ironside_se_boot_report.h

Lines changed: 65 additions & 0 deletions
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@@ -0,0 +1,65 @@
1+
/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_NORDIC_NRF54H_IRONSIDE_SE_BOOT_REPORT_INCLUDE_NRF_IRONSIDE_SE_BOOT_REPORT_H_
7+
#define ZEPHYR_SOC_NORDIC_NRF54H_IRONSIDE_SE_BOOT_REPORT_INCLUDE_NRF_IRONSIDE_SE_BOOT_REPORT_H_
8+
9+
#include <stdint.h>
10+
#include <stddef.h>
11+
12+
#define IRONSIDE_SE_BOOT_REPORT_LOCAL_DOMAIN_CONTEXT_SIZE \
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CONFIG_SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_LOCAL_DOMAIN_CONTEXT_SIZE
14+
#define IRONSIDE_SE_BOOT_REPORT_RANDOM_DATA_SIZE \
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CONFIG_SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_RANDOM_DATA_SIZE
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/** @brief UICR error description contained in the boot report. */
18+
struct ironside_se_boot_report_uicr_error {
19+
/** The type of error. A value of 0 indicates no error */
20+
uint32_t error_type;
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/** Error descrpitions specific to each type of UICR error */
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union {
23+
/** RFU */
24+
struct {
25+
uint32_t rfu[4];
26+
} rfu;
27+
} description;
28+
};
29+
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/** @brief IRONside boot report. */
31+
struct ironside_se_boot_report {
32+
/** Magic value used to identify valid boot report */
33+
uint32_t magic;
34+
/** Firmware version of IRONside SE. 8bit MAJOR.MINOR.PATCH.TWEAK */
35+
uint32_t ironside_se_version_int;
36+
/** Human readable extraversion of IRONside SE */
37+
char ironside_se_extraversion[12];
38+
/** Firmware version of IRONside SE recovery firmware. 8bit MAJOR.MINOR.PATCH.TWEAK */
39+
uint32_t ironside_se_recovery_version_int;
40+
/** Human readable extraversion of IRONside SE */
41+
char ironside_se_recovery_extraversion[12];
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/** Copy of SICR.UROT.UPDATE.STATUS.*/
43+
uint32_t ironside_update_status;
44+
/** See @ref ironside_se_boot_report_uicr_error */
45+
struct ironside_se_boot_report_uicr_error uicr_error_description;
46+
/** Data passed from booting local domain to local domain being booted */
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uint8_t local_domain_context[IRONSIDE_SE_BOOT_REPORT_LOCAL_DOMAIN_CONTEXT_SIZE];
48+
/** CSPRNG data */
49+
uint8_t random_data[IRONSIDE_SE_BOOT_REPORT_RANDOM_DATA_SIZE];
50+
/** Reserved for Future Use */
51+
uint32_t rfu[64];
52+
};
53+
54+
/**
55+
* @brief Get a pointer to the IRONside boot report.
56+
*
57+
* @param[out] report Will be set to point to the IRONside boot report.
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*
59+
* @return non-negative value if success, negative value otherwise.
60+
* @retval -EFAULT if the magic field in the report is incorrect.
61+
* @retval -EINVAL if @ref report is NULL.
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*/
63+
int ironside_se_boot_report_get(const struct ironside_se_boot_report **report);
64+
65+
#endif /* ZEPHYR_SOC_NORDIC_NRF54H_IRONSIDE_SE_BOOT_REPORT_INCLUDE_NRF_IRONSIDE_SE_BOOT_REPORT_H_ */

‎soc/nordic/nrf54h/ironside_se/ironside_se_boot_report.c

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@@ -0,0 +1,25 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
5+
6+
#include <errno.h>
7+
#include <zephyr/devicetree.h>
8+
#include <nrf/ironside_se_boot_report.h>
9+
10+
#define IRONSIDE_SE_BOOT_REPORT_ADDR DT_REG_ADDR(DT_NODELABEL(cpuapp_ironside_se_boot_report))
11+
#define IRONSIDE_SE_BOOT_REPORT_MAGIC CONFIG_SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_MAGIC
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13+
int ironside_se_boot_report_get(const struct ironside_se_boot_report **report)
14+
{
15+
const struct ironside_se_boot_report *tmp_report =
16+
(const struct ironside_se_boot_report *)IRONSIDE_SE_BOOT_REPORT_ADDR;
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18+
if (tmp_report->magic != IRONSIDE_SE_BOOT_REPORT_MAGIC) {
19+
return -EINVAL;
20+
}
21+
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*report = tmp_report;
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return 0;
25+
}

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