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[nrf fromtree] boards: Add non-secure target for nrf54L15dk
This adds the nrf54l15dk/nrf54l15/cpuapp/ns board variant to Zephyr. It allows to build applications for this target. This is an initial support for the non secure target which allows building and running tfm_ipc and config_build. This is NOT full support of the non secure target in upstream Zephyr. There are important limitations, such as: - The hardware Crypto accelerator is not supported and thus the non secur target is NOT secure for production applicatiions in upstream Zephyr. - The BL2 is not supported, so no DFU is supported with this support Most of the code chagnes here are taken from nRF Connect SDK in order to avoid having noups there. Signed-off-by: Georgios Vasilakis <[email protected]> (cherry picked from commit 47c71e3)
1 parent 56d3fe0 commit a9a44ea

15 files changed

+309
-3
lines changed

‎boards/nordic/nrf54l15dk/Kconfig

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@@ -0,0 +1,30 @@
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# Copyright (c) 2025 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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# nRF54L15 DK board configuration
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if BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS
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DT_NRF_MPC := $(dt_nodelabel_path,nrf_mpc)
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config NRF_TRUSTZONE_FLASH_REGION_SIZE
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hex
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default $(dt_node_int_prop_hex,$(DT_NRF_MPC),override-granularity)
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help
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This defines the flash region size from the TrustZone perspective.
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It is used when configuring the TrustZone and when setting alignments
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requirements for the partitions.
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This abstraction allows us to configure TrustZone without depending
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on peripheral-specific symbols.
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config NRF_TRUSTZONE_RAM_REGION_SIZE
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hex
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default $(dt_node_int_prop_hex,$(DT_NRF_MPC),override-granularity)
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help
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This defines the RAM region size from the TrustZone perspective.
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It is used when configuring the TrustZone and when setting alignments
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requirements for the partitions.
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This abstraction allows us to configure TrustZone without depending
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on peripheral specific symbols.
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endif # BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS

‎boards/nordic/nrf54l15dk/Kconfig.defconfig

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@@ -1,6 +1,10 @@
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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# Workaround for not being able to have commas in macro arguments
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DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
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DT_CHOSEN_Z_SRAM_PARTITION := zephyr,sram-secure-partition
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if BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \
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BOARD_NRF54L15DK_NRF54L15_CPUAPP
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@@ -10,3 +14,21 @@ config ROM_START_OFFSET
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endif # BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \
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# BOARD_NRF54L15DK_NRF54L15_CPUAPP
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if BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS
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config BT_CTLR
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default BT
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config FLASH_LOAD_OFFSET
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default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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# By default, if we build for a Non-Secure version of the board,
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# enable building with TF-M as the Secure Execution Environment.
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config BUILD_WITH_TFM
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default y
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endif # BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS

‎boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk

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@@ -4,6 +4,6 @@
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config BOARD_NRF54L15DK
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select SOC_NRF54L05_CPUAPP if BOARD_NRF54L15DK_NRF54L05_CPUAPP
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select SOC_NRF54L10_CPUAPP if BOARD_NRF54L15DK_NRF54L10_CPUAPP
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select SOC_NRF54L15_CPUAPP if BOARD_NRF54L15DK_NRF54L15_CPUAPP
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select SOC_NRF54L15_CPUAPP if BOARD_NRF54L15DK_NRF54L15_CPUAPP || BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS
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select SOC_NRF54L15_CPUFLPR if BOARD_NRF54L15DK_NRF54L15_CPUFLPR || \
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BOARD_NRF54L15DK_NRF54L15_CPUFLPR_XIP

‎boards/nordic/nrf54l15dk/board.cmake

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@@ -8,5 +8,13 @@ elseif(CONFIG_SOC_NRF54L05_CPUFLPR OR CONFIG_SOC_NRF54L10_CPUFLPR OR CONFIG_SOC_
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board_runner_args(jlink "--device=RISC-V" "--speed=4000" "-if SW" "--tool-opt=-jlinkscriptfile ${JLINKSCRIPTFILE}")
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endif()
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if(CONFIG_BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS)
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set(TFM_PUBLIC_KEY_FORMAT "full")
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endif()
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if(CONFIG_TFM_FLASH_MERGED_BINARY)
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set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
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endif()
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include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

‎boards/nordic/nrf54l15dk/board.yml

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@@ -9,3 +9,5 @@ board:
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variants:
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- name: xip
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cpucluster: cpuflpr
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- name: ns
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cpucluster: cpuapp

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp_ns.dts

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#define USE_NON_SECURE_ADDRESS_MAP 1
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#include <nordic/nrf54l15_cpuapp.dtsi>
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#include "nrf54l_05_10_15_cpuapp_common.dtsi"
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/ {
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compatible = "nordic,nrf54l15dk_nrf54l15-cpuapp";
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model = "Nordic nRF54L15 DK nRF54L15 Application MCU";
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chosen {
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zephyr,code-partition = &slot0_ns_partition;
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zephyr,sram = &sram0_ns;
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zephyr,entropy = &psa_rng;
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};
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/delete-node/ rng;
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psa_rng: psa-rng {
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status = "okay";
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};
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};
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/ {
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/*
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* Default SRAM planning when building for nRF54L15 with ARM TrustZone-M support
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* - Lowest 80 kB SRAM allocated to Secure image (sram0_s).
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* - Upper 80 kB SRAM allocated to Non-Secure image (sram0_ns).
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*
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* nRF54L15 has 256 kB of volatile memory (SRAM) but the last 96kB are reserved for
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* the FLPR MCU.
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* This static layout needs to be the same with the upstream TF-M layout in the
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* header flash_layout.h of the relevant platform. Any updates in the layout
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* needs to happen both in the flash_layout.h and in this file at the same time.
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*/
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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sram0_s: image_s@20000000 {
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/* Secure image memory */
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reg = <0x20000000 DT_SIZE_K(80)>;
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};
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sram0_ns: image_ns@20014000 {
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/* Non-Secure image memory */
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reg = <0x20014000 DT_SIZE_K(80)>;
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};
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};
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};
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&cpuapp_rram {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
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* last 96kB are reserved for the FLPR MCU.
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*
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* This static layout needs to be the same with the upstream TF-M layout in the
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* header flash_layout.h of the relevant platform. Any updates in the layout
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* needs to happen both in the flash_layout.h and in this file at the same time.
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*/
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slot0_partition: partition@0 {
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label = "image-0";
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reg = <0x0000000 DT_SIZE_K(512)>;
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};
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tfm_ps_partition: partition@80000 {
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label = "tfm-ps";
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reg = <0x00080000 DT_SIZE_K(16)>;
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};
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tfm_its_partition: partition@84000 {
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label = "tfm-its";
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reg = <0x00084000 DT_SIZE_K(16)>;
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};
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tfm_otp_partition: partition@88000 {
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label = "tfm-otp";
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reg = <0x00088000 DT_SIZE_K(8)>;
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};
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slot0_ns_partition: partition@8A000 {
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label = "image-0-nonsecure";
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reg = <0x0008A000 DT_SIZE_K(844)>;
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};
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storage_partition: partition@15D000 {
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label = "storage";
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reg = <0x00015D000 DT_SIZE_K(32)>;
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};
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};
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};
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&uart30 {
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/* Disable so that TF-M can use this UART */
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status = "disabled";
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current-speed = <115200>;
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pinctrl-0 = <&uart30_default>;
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pinctrl-1 = <&uart30_sleep>;
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pinctrl-names = "default", "sleep";
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};

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp_ns.yaml

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# Copyright (c) 2025 Nordic Semiconductor ASA
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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identifier: nrf54l15dk/nrf54l15/cpuapp/ns
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name: nRF54l15-DK-nRF54l15-Application-Non-Secure
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type: mcu
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arch: arm
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toolchain:
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- gnuarmemb
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- zephyr
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ram: 256
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flash: 1524
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supported:
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- adc
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- gpio
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- i2c
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- spi
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- counter
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- watchdog
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- adc
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- i2s

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp_ns_defconfig

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# Copyright (c) 2025 Nordic Semiconductor ASA
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
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CONFIG_ARM_TRUSTZONE_M=y
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# This Board implies building Non-Secure firmware
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CONFIG_TRUSTED_EXECUTION_NONSECURE=y
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# Don't enable the cache in the non-secure image as it is a
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# secure-only peripheral on 54l
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CONFIG_CACHE_MANAGEMENT=n
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CONFIG_EXTERNAL_CACHE=n
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CONFIG_UART_CONSOLE=y
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CONFIG_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_GPIO=y
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# Start SYSCOUNTER on driver init
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CONFIG_NRF_GRTC_START_SYSCOUNTER=y
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# Disable TFM BL2 since it is not supported
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CONFIG_TFM_BL2=n
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# Support for silence logging is not supported at the moment
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# Tracked by: NCSDK-31930
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CONFIG_TFM_LOG_LEVEL_SILENCE=n
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# The oscillators are configured as secure and cannot be configured
33+
# from the non secure application directly. This needs to be set
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# otherwise nrfx will try to configure them, resulting in a bus
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# fault.
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CONFIG_SOC_NRF54LX_SKIP_CLOCK_CONFIG=y

‎modules/trusted-firmware-m/Kconfig.tfm

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@@ -25,6 +25,7 @@ config TFM_BOARD
2525
default "${ZEPHYR_BASE}/modules/trusted-firmware-m/nordic/nrf9160" if SOC_NRF9160
2626
default "${ZEPHYR_BASE}/modules/trusted-firmware-m/nordic/nrf9120" if SOC_NRF9120
2727
default "${ZEPHYR_BASE}/modules/trusted-firmware-m/nordic/nrf5340_cpuapp" if SOC_NRF5340_CPUAPP
28+
default "${ZEPHYR_BASE}/modules/trusted-firmware-m/nordic/nrf54l15_cpuapp" if SOC_NRF54L15_CPUAPP
2829
help
2930
The board name used for building TFM. Building with TFM requires that
3031
TFM has been ported to the given board/SoC.

‎modules/trusted-firmware-m/nordic/include/RTE_Device.h

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2929
) \
3030
}
3131

32-
#endif
32+
#else
3333

3434
/* Configuration settings for Driver_USART1. */
35-
#if DT_PINCTRL_HAS_NAME(DT_NODELABEL(uart1), default) && DOMAIN_NS != 1U
35+
#if DT_PINCTRL_HAS_NAME(DT_NODELABEL(uart1), default)
3636

3737
#define RTE_USART1 1
3838

@@ -44,6 +44,20 @@
4444
) \
4545
}
4646

47+
#elif DT_PINCTRL_HAS_NAME(DT_NODELABEL(uart30), default)
48+
49+
#define RTE_USART30 1
50+
51+
#define RTE_USART30_PINS \
52+
{ \
53+
DT_FOREACH_CHILD_VARGS( \
54+
DT_PINCTRL_BY_NAME(DT_NODELABEL(uart30), default, 0), \
55+
DT_FOREACH_PROP_ELEM, psels, UART_PIN_INIT \
56+
) \
57+
}
58+
59+
#endif
60+
4761
#endif
4862

4963
/* Configuration settings for Driver_FLASH0. */

‎modules/trusted-firmware-m/nordic/include/tfm_peripherals_config.h

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@@ -12,9 +12,15 @@ extern "C" {
1212
#endif
1313

1414
#ifdef SECURE_UART1
15+
16+
#if defined(NRF54L15_XXAA)
17+
#define TFM_PERIPHERAL_UARTE30_SECURE 1
18+
#else
1519
#define TFM_PERIPHERAL_UARTE1_SECURE 1
1620
#endif
1721

22+
#endif /* SECURE_UART1 */
23+
1824
#if TEST_NS_SLIH_IRQ || TEST_NS_FLIH_IRQ
1925
#define TFM_PERIPHERAL_TIMER0_SECURE 1
2026
#endif
@@ -29,6 +35,8 @@ extern "C" {
2935
#include <tfm_peripherals_config_nrf91.h>
3036
#elif defined(NRF5340_XXAA_APPLICATION)
3137
#include <tfm_peripherals_config_nrf5340_application.h>
38+
#elif defined(NRF54L15_XXAA)
39+
#include <tfm_peripherals_config_nrf54l15.h>
3240
#else
3341
#error "Unknown device."
3442
#endif

‎modules/trusted-firmware-m/nordic/nrf54l15_cpuapp/CMakeLists.txt

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#
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# Copyright (c) 2025, Nordic Semiconductor ASA.
3+
#
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# SPDX-License-Identifier: Apache-2.0
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#
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7+
set(NRF_BOARD_SELECTED True)
8+
9+
add_subdirectory(${Trusted\ Firmware\ M_SOURCE_DIR}/platform/ext/target/nordic_nrf/common/nrf54l15 nrf54l15)
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add_subdirectory(.. common)
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install(FILES ${CMAKE_CURRENT_LIST_DIR}/ns/cpuarch_ns.cmake
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DESTINATION ${INSTALL_PLATFORM_NS_DIR}
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RENAME cpuarch.cmake)
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install(FILES config.cmake
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DESTINATION ${INSTALL_PLATFORM_NS_DIR})
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20+
install(DIRECTORY ${Trusted\ Firmware\ M_SOURCE_DIR}/platform/ext/target/nordic_nrf/nrf54l15dk_nrf54l15_cpuapp/tests
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22+
DESTINATION ${INSTALL_PLATFORM_NS_DIR}
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)

‎modules/trusted-firmware-m/nordic/nrf54l15_cpuapp/config.cmake

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#
2+
# Copyright (c) 2025, Nordic Semiconductor ASA.
3+
#
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# SPDX-License-Identifier: Apache-2.0
5+
#
6+
7+
set(NRF_SOC_VARIANT nrf54l15 CACHE STRING "nRF SoC Variant")
8+
9+
include(${PLATFORM_PATH}/common/nrf54l15/config.cmake)

‎modules/trusted-firmware-m/nordic/nrf54l15_cpuapp/cpuarch.cmake

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1+
#
2+
# Copyright (c) 2025, Nordic Semiconductor ASA.
3+
#
4+
# SPDX-License-Identifier: Apache-2.0
5+
#
6+
7+
set(PLATFORM_PATH platform/ext/target/nordic_nrf)
8+
9+
include(${PLATFORM_PATH}/common/nrf54l15/cpuarch.cmake)

‎modules/trusted-firmware-m/nordic/nrf54l15_cpuapp/ns/cpuarch_ns.cmake

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1+
#
2+
# Copyright (c) 2025, Nordic Semiconductor ASA.
3+
#
4+
# SPDX-License-Identifier: Apache-2.0
5+
#
6+
7+
set(PLATFORM_DIR ${CMAKE_CURRENT_LIST_DIR})
8+
set(PLATFORM_PATH ${CMAKE_CURRENT_LIST_DIR})
9+
10+
include(${CMAKE_CURRENT_LIST_DIR}/common/nrf54l15/cpuarch.cmake)

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