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[nrf toup] soc: add ironside boot report
Signed-off-by: Håkon Amundsen <[email protected]>
1 parent 749f6b5 commit ba5eedb

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11 files changed

+238
-6
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11 files changed

+238
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‎boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_iron.dts

+64-6
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,25 @@
66

77
#include "nrf54h20dk_nrf54h20_cpuapp.dts"
88

9-
/delete-node/&cpurad_rx_partitions;
9+
/* The code partitions are re-defined below, so delete the parent node. */
1010
/delete-node/&cpuapp_rx_partitions;
1111

12+
/* No radio support for IRON variant, don't allocate MRAM. */
13+
/delete-node/&cpurad_rx_partitions;
14+
15+
/* All of ram0x goes to cpuapp, delete these nodes to re-define below. */
16+
/delete-node/&cpuapp_ram0x_region;
17+
/delete-node/&cpurad_ram0x_region;
18+
19+
/* IPC mechanism for IRON variant differs, delete the old node. */
20+
/delete-node/&cpusec_cpuapp_ipc;
21+
22+
/* Update the location of cpusys IPC shared memory */
23+
/delete-node/&cpuapp_cpusys_ipc_shm;
24+
/delete-node/&cpusys_cpuapp_ipc_shm;
25+
/delete-node/&cpurad_cpusys_ipc_shm;
26+
/delete-node/&cpusys_cpurad_ipc_shm;
27+
1228
/* This is not yet an exhaustive memory map, and contain only a minimum required to boot
1329
* the application core.
1430
*/
@@ -21,15 +37,57 @@
2137
#size-cells = <1>;
2238

2339
cpuapp_slot0_partition: partition@2c000 {
24-
reg = <0x2c000 DT_SIZE_K(480)>;
40+
reg = <0x2c000 DT_SIZE_K(736)>;
2541
};
2642

27-
cpuppr_code_partition: partition@a4000 {
28-
reg = <0xa4000 DT_SIZE_K(64)>;
43+
cpuppr_code_partition: partition@e4000 {
44+
reg = <0xe4000 DT_SIZE_K(64)>;
45+
};
46+
47+
cpuflpr_code_partition: partition@f4000 {
48+
reg = <0xf4000 DT_SIZE_K(48)>;
49+
};
50+
};
51+
};
52+
53+
/ {
54+
reserved-memory {
55+
cpuapp_ram0x_region: memory@2f000000 {
56+
compatible = "nordic,owned-memory", "fixed-partitions";
57+
nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RWS>;
58+
reg = <0x2f000000 DT_SIZE_K(768)>;
59+
status = "disabled";
60+
#address-cells = <1>;
61+
#size-cells = <1>;
62+
ranges = <0x0 0x2f000000 0xc0000>;
63+
cpuapp_data: memory@0{
64+
reg = <0x0 DT_SIZE_K(768)>;
65+
};
2966
};
3067

31-
cpuflpr_code_partition: partition@b4000 {
32-
reg = <0xb4000 DT_SIZE_K(48)>;
68+
sysctrl_rom_report: memory@2f88ff00 {
69+
reg = <0x2f88ff00 0x100>;
3370
};
71+
72+
cpuapp_ironside_se_boot_report: memory@2f88fd00 {
73+
reg = <0x2f88fd00 0x200>;
74+
};
75+
76+
cpuapp_cpusys_ipc_shm: memory@2f88f600 {
77+
reg = <0x2f88f600 0x80>;
78+
};
79+
80+
cpusys_cpuapp_ipc_shm: memory@2f88f680 {
81+
reg = <0x2f88f680 0x80>;
82+
};
83+
84+
cpurad_cpusys_ipc_shm: memory@2f88f700 {
85+
reg = <0x2f88f700 0x80>;
86+
};
87+
88+
cpusys_cpurad_ipc_shm: memory@2f88f780 {
89+
reg = <0x2f88f780 0x80>;
90+
};
91+
3492
};
3593
};

‎soc/nordic/nrf54h/CMakeLists.txt

+1
Original file line numberDiff line numberDiff line change
@@ -18,3 +18,4 @@ zephyr_linker_sources(SECTIONS SORT_KEY zzz_place_align_at_end align.ld)
1818

1919
add_subdirectory(bicr)
2020
add_subdirectory(gpd)
21+
add_subdirectory(ironside_se)

‎soc/nordic/nrf54h/Kconfig

+1
Original file line numberDiff line numberDiff line change
@@ -74,3 +74,4 @@ config SOC_NRF54H20_CPUFLPR
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7575
rsource "bicr/Kconfig"
7676
rsource "gpd/Kconfig"
77+
rsource "ironside_se/Kconfig"

‎soc/nordic/nrf54h/ironside_se/CMakeLists.txt

+5
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
# Copyright (c) 2025 Nordic Semiconductor
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
zephyr_library_sources_ifdef(CONFIG_SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT ironside_se_boot_report.c)
5+
zephyr_include_directories(include)

‎soc/nordic/nrf54h/ironside_se/Kconfig

+27
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,27 @@
1+
# Copyright (c) 2025 Nordic Semiconductor
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT
5+
bool "Nordic IRONside SE boot report"
6+
default y if SOC_NRF54H20_CPUAPP
7+
depends on SOC_NRF54H20_IRON
8+
help
9+
This option enables parsing of the Boot Report populated by Nordic IRONside SE.
10+
11+
config SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_MAGIC
12+
hex
13+
default 0x4d69546f
14+
help
15+
Constant used to check if an Nordic IRONside SE boot report has been written.
16+
17+
config SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_LOCAL_DOMAIN_CONTEXT_SIZE
18+
int
19+
default 32
20+
help
21+
Size of the local domain context in bytes
22+
23+
config SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_RANDOM_DATA_SIZE
24+
int
25+
default 32
26+
help
27+
Size of the random data in bytes

‎soc/nordic/nrf54h/ironside_se/include/nrf/ironside_se_boot_report.h

+65
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@@ -0,0 +1,65 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
#ifndef ZEPHYR_SOC_NORDIC_NRF54H_IRONSIDE_SE_BOOT_REPORT_INCLUDE_NRF_IRONSIDE_SE_BOOT_REPORT_H_
7+
#define ZEPHYR_SOC_NORDIC_NRF54H_IRONSIDE_SE_BOOT_REPORT_INCLUDE_NRF_IRONSIDE_SE_BOOT_REPORT_H_
8+
9+
#include <stdint.h>
10+
#include <stddef.h>
11+
12+
#define IRONSIDE_SE_BOOT_REPORT_LOCAL_DOMAIN_CONTEXT_SIZE \
13+
CONFIG_SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_LOCAL_DOMAIN_CONTEXT_SIZE
14+
#define IRONSIDE_SE_BOOT_REPORT_RANDOM_DATA_SIZE \
15+
CONFIG_SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_RANDOM_DATA_SIZE
16+
17+
/** @brief UICR error description contained in the boot report. */
18+
struct ironside_se_boot_report_uicr_error {
19+
/** The type of error. A value of 0 indicates no error */
20+
uint32_t error_type;
21+
/** Error descrpitions specific to each type of UICR error */
22+
union {
23+
/** RFU */
24+
struct {
25+
uint32_t rfu[4];
26+
} rfu;
27+
} description;
28+
};
29+
30+
/** @brief IRONside boot report. */
31+
struct ironside_se_boot_report {
32+
/** Magic value used to identify valid boot report */
33+
uint32_t magic;
34+
/** Firmware version of IRONside SE. 8bit MAJOR.MINOR.PATCH.TWEAK */
35+
uint32_t ironside_se_version_int;
36+
/** Human readable extraversion of IRONside SE */
37+
char ironside_se_extraversion[12];
38+
/** Firmware version of IRONside SE recovery firmware. 8bit MAJOR.MINOR.PATCH.TWEAK */
39+
uint32_t ironside_se_recovery_version_int;
40+
/** Human readable extraversion of IRONside SE */
41+
char ironside_se_recovery_extraversion[12];
42+
/** Copy of SICR.UROT.UPDATE.STATUS.*/
43+
uint32_t ironside_update_status;
44+
/** See @ref ironside_se_boot_report_uicr_error */
45+
struct ironside_se_boot_report_uicr_error uicr_error_description;
46+
/** Data passed from booting local domain to local domain being booted */
47+
uint8_t local_domain_context[IRONSIDE_SE_BOOT_REPORT_LOCAL_DOMAIN_CONTEXT_SIZE];
48+
/** CSPRNG data */
49+
uint8_t random_data[IRONSIDE_SE_BOOT_REPORT_RANDOM_DATA_SIZE];
50+
/** Reserved for Future Use */
51+
uint32_t rfu[64];
52+
};
53+
54+
/**
55+
* @brief Get a pointer to the IRONside boot report.
56+
*
57+
* @param[out] report Will be set to point to the IRONside boot report.
58+
*
59+
* @return non-negative value if success, negative value otherwise.
60+
* @retval -EFAULT if the magic field in the report is incorrect.
61+
* @retval -EINVAL if @ref report is NULL.
62+
*/
63+
int ironside_se_boot_report_get(const struct ironside_se_boot_report **report);
64+
65+
#endif /* ZEPHYR_SOC_NORDIC_NRF54H_IRONSIDE_SE_BOOT_REPORT_INCLUDE_NRF_IRONSIDE_SE_BOOT_REPORT_H_ */

‎soc/nordic/nrf54h/ironside_se/ironside_se_boot_report.c

+25
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@@ -0,0 +1,25 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
#include <errno.h>
7+
#include <zephyr/devicetree.h>
8+
#include <nrf/ironside_se_boot_report.h>
9+
10+
#define IRONSIDE_SE_BOOT_REPORT_ADDR DT_REG_ADDR(DT_NODELABEL(cpuapp_ironside_se_boot_report))
11+
#define IRONSIDE_SE_BOOT_REPORT_MAGIC CONFIG_SOC_NRF54H20_IRONSIDE_SE_BOOT_REPORT_MAGIC
12+
13+
int ironside_se_boot_report_get(const struct ironside_se_boot_report **report)
14+
{
15+
const struct ironside_se_boot_report *tmp_report =
16+
(const struct ironside_se_boot_report *)IRONSIDE_SE_BOOT_REPORT_ADDR;
17+
18+
if (tmp_report->magic != IRONSIDE_SE_BOOT_REPORT_MAGIC) {
19+
return -EINVAL;
20+
}
21+
22+
*report = tmp_report;
23+
24+
return 0;
25+
}

‎tests/boards/nrf/ironside_se_boot_report/CMakeLists.txt

+9
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@@ -0,0 +1,9 @@
1+
# Copyright (c) 2025 Nordic Semiconductor
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
cmake_minimum_required(VERSION 3.20.0)
5+
find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
6+
project(ironside_se_boot_report)
7+
8+
FILE(GLOB app_sources src/*.c)
9+
target_sources(app PRIVATE ${app_sources})

‎tests/boards/nrf/ironside_se_boot_report/prj.conf

+1
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@@ -0,0 +1 @@
1+
# Empty

‎tests/boards/nrf/ironside_se_boot_report/src/main.c

+21
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@@ -0,0 +1,21 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include <nrf/ironside_se_boot_report.h>
8+
#include <stdio.h>
9+
10+
int main(void)
11+
{
12+
int err;
13+
const struct ironside_se_boot_report *report;
14+
15+
err = ironside_se_boot_report_get(&report);
16+
printf("err: %d\n", err);
17+
printf("version: 0x%x\n", report->ironside_se_version_int);
18+
printf("extraversion: %s\n", report->ironside_se_extraversion);
19+
20+
return 0;
21+
}

‎tests/boards/nrf/ironside_se_boot_report/testcase.yaml

+19
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@@ -0,0 +1,19 @@
1+
common:
2+
tags:
3+
- drivers
4+
- hwinfo
5+
harness: console
6+
7+
tests:
8+
soc.nordic.ironside_se_boot_report:
9+
harness_config:
10+
type: multi_line
11+
ordered: true
12+
regex:
13+
- "err: 0"
14+
- "version: 0x([0-9a-fA-F]+)"
15+
- "extraversion: ([0-9a-fA-F]+)"
16+
platform_allow:
17+
- nrf54h20dk/nrf54h20/cpuapp/iron
18+
integration_platforms:
19+
- nrf54h20dk/nrf54h20/cpuapp/iron

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