@@ -108,6 +108,10 @@ static const nrf_gpio_pin_drive_t drive_modes[NRF_DRIVE_COUNT] = {
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#endif
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#endif
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+ #if DT_HAS_COMPAT_STATUS_OKAY (nordic_nrf_tdm )
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+ #define NRF_PSEL_TDM (reg , line ) ((NRF_TDM_Type *)reg)->PSEL.line
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+ #endif
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+
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int pinctrl_configure_pins (const pinctrl_soc_pin_t * pins , uint8_t pin_cnt ,
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uintptr_t reg )
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{
@@ -354,6 +358,47 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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input = NRF_GPIO_PIN_INPUT_DISCONNECT ;
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break ;
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#endif /* defined(NRF_PSEL_QSPI) */
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+ #if defined(NRF_PSEL_TDM )
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+ case NRF_FUN_TDM_SCK_M :
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+ NRF_PSEL_TDM (reg , SCK ) = psel ;
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+ write = 0U ;
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+ dir = NRF_GPIO_PIN_DIR_OUTPUT ;
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+ input = NRF_GPIO_PIN_INPUT_DISCONNECT ;
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+ break ;
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+ case NRF_FUN_TDM_SCK_S :
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+ NRF_PSEL_TDM (reg , SCK ) = psel ;
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+ dir = NRF_GPIO_PIN_DIR_INPUT ;
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+ input = NRF_GPIO_PIN_INPUT_CONNECT ;
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+ break ;
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+ case NRF_FUN_TDM_FSYNC_M :
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+ NRF_PSEL_TDM (reg , FSYNC ) = psel ;
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+ write = 0U ;
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+ dir = NRF_GPIO_PIN_DIR_OUTPUT ;
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+ input = NRF_GPIO_PIN_INPUT_DISCONNECT ;
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+ break ;
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+ case NRF_FUN_TDM_FSYNC_S :
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+ NRF_PSEL_TDM (reg , FSYNC ) = psel ;
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+ dir = NRF_GPIO_PIN_DIR_INPUT ;
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+ input = NRF_GPIO_PIN_INPUT_CONNECT ;
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+ break ;
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+ case NRF_FUN_TDM_SDIN :
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+ NRF_PSEL_TDM (reg , SDIN ) = psel ;
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+ dir = NRF_GPIO_PIN_DIR_INPUT ;
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+ input = NRF_GPIO_PIN_INPUT_CONNECT ;
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+ break ;
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+ case NRF_FUN_TDM_SDOUT :
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+ NRF_PSEL_TDM (reg , SDOUT ) = psel ;
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+ write = 0U ;
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+ dir = NRF_GPIO_PIN_DIR_OUTPUT ;
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+ input = NRF_GPIO_PIN_INPUT_DISCONNECT ;
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+ break ;
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+ case NRF_FUN_TDM_MCK :
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+ NRF_PSEL_TDM (reg , MCK ) = psel ;
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+ write = 0U ;
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+ dir = NRF_GPIO_PIN_DIR_OUTPUT ;
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+ input = NRF_GPIO_PIN_INPUT_DISCONNECT ;
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+ break ;
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+ #endif /* defined(NRF_PSEL_TDM) */
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#if defined(NRF_GRTC_CLKOUT_FAST )
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case NRF_FUN_GRTC_CLKOUT_FAST :
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#if NRF_GPIO_HAS_SEL && defined(GPIO_PIN_CNF_CTRLSEL_GRTC )
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