Is the configuration for the OutputClock incomplete? In the register definitions, there is a CLOCK_GATE which enables/disables the output gate, but there is also a GATE_RUN register which "sets the gate using run status. Bit 0 = 0: Clock runs whenever CLOCK_GATE(0) is 1. Bit 0 = 1: Clock runs only when acquisition is in RUNNING state."

Currently, only CLOCK_GATE is written to. If the GATE_RUN register is always set to 0, this would be correct, but from the datasheet it appears that the POR value for GATE_RUN is 1, indicating that CLOCK_GATE might not have any effect right now.