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1 parent 88f5efa commit cdbad72Copy full SHA for cdbad72
src/riscv32.rs
@@ -1,7 +1,8 @@
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intrinsics! {
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// Implementation from gcc
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// https://raw.githubusercontent.com/gcc-mirror/gcc/master/libgcc/config/epiphany/mulsi3.c
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- pub extern "C" fn __mulsi3(mut a: u32, mut b: u32) -> u32 {
+ pub extern "C" fn __mulsi3(a: u32, b: u32) -> u32 {
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+ let (mut a, mut b) = (a, b);
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let mut r: usize = 0;
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while a > 0 {
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