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Use mlir-verilog by default rather than coreir-verilog. I believe this is already a goal of magma 3.0.
Avoid compilation when possible. I.e. use circuit properties or repr when possible. Ideally compilation should only check the backend, not in-memory properties.
If compilation is necessary, compile to the IR only when possible (i.e. avoid compiling to verilog). Verilog compilation should be reserved for features which are very specific to verilog.
Move functional tests (e.g. those that use verilator or fault) to an integration testing suite that runs nightly.
The text was updated successfully, but these errors were encountered:
For functional test, one approach is to regress on a representation (depending on the goal, could check magma repr, or MLIR, or verilog). If it changes, run the functional test and update the golds if it passes. This would avoid functional tests in the standard CI, but running those on a schedule may also be worthwhile to detect other changes (e.g. simulator changes affecting the tests).
Here are some ideas for speeding up our testing:
The text was updated successfully, but these errors were encountered: