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verilog/README.md
@@ -141,3 +141,4 @@ You can use the provided `traffic.v` and `traffic_tb.v`.
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## Links
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- [Verilog cheatsheet](https://www.cl.cam.ac.uk/teaching/0910/ECAD+Arch/files/verilogcheatsheet.pdf) (PDF)
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+- [HDLBits](https://hdlbits.01xz.net/wiki/Problem_sets) - online, interactive Verilog exercises
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