@@ -21,61 +21,70 @@ using namespace std::literals::chrono_literals;
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LOG_DEFINE_CATEGORY (RPiController)
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- static const std::map<std::string, Controller::HardwareConfig> HardwareConfigMap = {
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- {
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- " bcm2835" ,
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+ namespace {
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+
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+ const std::map<std::string, Controller::HardwareConfig> &hardwareConfigMap ()
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+ {
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+ static const std::map<std::string, Controller::HardwareConfig> map = {
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{
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- /*
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- * There are only ever 15 AGC regions computed by the firmware
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- * due to zoning, but the HW defines AGC_REGIONS == 16!
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- */
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- . agcRegions = { 15 , 1 },
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- . agcZoneWeights = { 15 , 1 },
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- . awbRegions = { 16 , 12 },
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- . cacRegions = { 0 , 0 },
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- . focusRegions = { 4 , 3 },
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- . numHistogramBins = 128 ,
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- . numGammaPoints = 33 ,
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- . pipelineWidth = 13 ,
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- . statsInline = false ,
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- . minPixelProcessingTime = 0s ,
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- . dataBufferStrided = true ,
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- }
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- } ,
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- {
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- " pisp " ,
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+ " bcm2835 " ,
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+ {
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+ /*
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+ * There are only ever 15 AGC regions computed by the firmware
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+ * due to zoning, but the HW defines AGC_REGIONS == 16!
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+ */
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+ . agcRegions = { 15 , 1 },
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+ . agcZoneWeights = { 15 , 1 },
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+ . awbRegions = { 16 , 12 },
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+ . cacRegions = { 0 , 0 } ,
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+ . focusRegions = { 4 , 3 } ,
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+ . numHistogramBins = 128 ,
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+ . numGammaPoints = 33 ,
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+ . pipelineWidth = 13 ,
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+ . statsInline = false ,
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+ . minPixelProcessingTime = 0s,
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+ . dataBufferStrided = true ,
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+ }
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+ } ,
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{
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- .agcRegions = { 0 , 0 },
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- .agcZoneWeights = { 15 , 15 },
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- .awbRegions = { 32 , 32 },
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- .cacRegions = { 8 , 8 },
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- .focusRegions = { 8 , 8 },
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- .numHistogramBins = 1024 ,
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- .numGammaPoints = 64 ,
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- .pipelineWidth = 16 ,
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- .statsInline = true ,
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-
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- /*
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- * The constraint below is on the rate of pixels going
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- * from CSI2 peripheral to ISP-FE (400Mpix/s, plus tiny
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- * overheads per scanline, for which 380Mpix/s is a
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- * conservative bound).
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- *
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- * There is a 64kbit data FIFO before the bottleneck,
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- * which means that in all reasonable cases the
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- * constraint applies at a timescale >= 1 scanline, so
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- * adding horizontal blanking can prevent loss.
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- *
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- * If the backlog were to grow beyond 64kbit during a
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- * single scanline, there could still be loss. This
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- * could happen using 4 lanes at 1.5Gbps at 10bpp with
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- * frames wider than ~16,000 pixels.
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- */
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- .minPixelProcessingTime = 1 .0us / 380 ,
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- .dataBufferStrided = false ,
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- }
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- },
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- };
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+ " pisp" ,
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+ {
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+ .agcRegions = { 0 , 0 },
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+ .agcZoneWeights = { 15 , 15 },
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+ .awbRegions = { 32 , 32 },
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+ .cacRegions = { 8 , 8 },
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+ .focusRegions = { 8 , 8 },
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+ .numHistogramBins = 1024 ,
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+ .numGammaPoints = 64 ,
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+ .pipelineWidth = 16 ,
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+ .statsInline = true ,
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+
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+ /*
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+ * The constraint below is on the rate of pixels going
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+ * from CSI2 peripheral to ISP-FE (400Mpix/s, plus tiny
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+ * overheads per scanline, for which 380Mpix/s is a
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+ * conservative bound).
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+ *
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+ * There is a 64kbit data FIFO before the bottleneck,
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+ * which means that in all reasonable cases the
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+ * constraint applies at a timescale >= 1 scanline, so
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+ * adding horizontal blanking can prevent loss.
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+ *
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+ * If the backlog were to grow beyond 64kbit during a
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+ * single scanline, there could still be loss. This
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+ * could happen using 4 lanes at 1.5Gbps at 10bpp with
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+ * frames wider than ~16,000 pixels.
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+ */
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+ .minPixelProcessingTime = 1 .0us / 380 ,
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+ .dataBufferStrided = false ,
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+ }
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+ },
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+ };
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+
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+ return map;
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+ }
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+
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+ } /* namespace */
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Controller::Controller ()
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: switchModeCalled_(false )
@@ -211,12 +220,12 @@ const std::string &Controller::getTarget() const
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const Controller::HardwareConfig &Controller::getHardwareConfig () const
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{
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- auto cfg = HardwareConfigMap .find (getTarget ());
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+ auto cfg = hardwareConfigMap () .find (getTarget ());
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/*
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* This really should not happen, the IPA ought to validate the target
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* on initialisation.
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*/
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- ASSERT (cfg != HardwareConfigMap .end ());
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+ ASSERT (cfg != hardwareConfigMap () .end ());
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return cfg->second ;
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}
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