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agattidpgeorge
agatti
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qemu/mcu/arm: Dump exception cause and registers on machine error.
When a CPU exception is raised when emulating a Thumb-capable processor, the default exception handler would simply enter in an endless loop without providing any further information. This commit adds a more complete exception handler that dumps to STDOUT the exception cause and the status of the registers at the moment of the exception. Signed-off-by: Alessandro Gatti <[email protected]>
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3 files changed

+199
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lines changed

‎ports/qemu/Makefile

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@@ -44,6 +44,7 @@ LDFLAGS += -nostdlib
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LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
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SRC_C += \
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mcu/arm/errorhandler.c \
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mcu/arm/startup.c \
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shared/runtime/semihosting_arm.c \
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‎ports/qemu/mcu/arm/errorhandler.c

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/*
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* This file is part of the MicroPython project, https://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2024 Alessandro Gatti
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include "py/runtime.h"
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#if defined(__ARM_ARCH_ISA_THUMB)
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typedef enum _exception_kind_t {
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RESET = 1,
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NMI = 2,
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HARD_FAULT = 3,
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MEM_MANAGE = 4,
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BUS_FAULT = 5,
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USAGE_FAULT = 6,
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SV_CALL = 11,
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DEBUG_MONITOR = 12,
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PENDING_SV = 13,
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SYSTEM_TICK = 14,
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} exception_kind_t;
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static const char *EXCEPTION_NAMES_TABLE[] = {
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"Reserved",
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"Reset",
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"NMI",
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"HardFault",
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"MemManage",
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"BusFault",
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"UsageFault",
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"SVCall",
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"DebugMonitor",
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"PendSV",
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"SysTick",
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"External interrupt"
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};
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// R0-R15, PSR, Kind
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uintptr_t registers_copy[18] = { 0 };
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__attribute__((naked)) NORETURN void exception_handler(uintptr_t kind) {
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// Save registers
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__asm volatile (
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"ldr r1, =registers_copy \n"
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"str r0, [r1, #68] \n" // Kind
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"ldr r0, [sp, #0] \n" // R0
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"str r0, [r1, #0] \n"
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"ldr r0, [sp, #4] \n" // R1
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"str r0, [r1, #4] \n"
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"ldr r0, [sp, #8] \n" // R2
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"str r0, [r1, #8] \n"
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"ldr r0, [sp, #12] \n" // R3
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"str r0, [r1, #12] \n"
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"str r4, [r1, #16] \n"
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"str r5, [r1, #20] \n"
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"str r6, [r1, #24] \n"
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"str r7, [r1, #28] \n"
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"mov r0, r8 \n"
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"str r0, [r1, #32] \n"
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"mov r0, r9 \n"
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"str r0, [r1, #36] \n"
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"mov r0, r10 \n"
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"str r0, [r1, #40] \n"
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"mov r0, r11 \n"
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"str r0, [r1, #44] \n"
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"ldr r0, [sp, #16] \n" // R12
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"str r0, [r1, #48] \n"
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"mov r0, sp \n"
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"sub r0, #32 \n"
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"str r0, [r1, #52] \n"
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"ldr r0, [sp, #20] \n" // R14
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"str r0, [r1, #56] \n"
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"ldr r0, [sp, #24] \n" // R15
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"str r0, [r1, #60] \n"
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"ldr r0, [sp, #28] \n" // xPSR
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"str r0, [r1, #64] \n"
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:
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:
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: "memory"
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);
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uintptr_t saved_kind = registers_copy[17];
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switch (saved_kind) {
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case RESET:
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case NMI:
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case HARD_FAULT:
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case MEM_MANAGE:
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case BUS_FAULT:
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case USAGE_FAULT:
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case SV_CALL:
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case DEBUG_MONITOR:
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case PENDING_SV:
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case SYSTEM_TICK:
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printf(EXCEPTION_NAMES_TABLE[saved_kind]);
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break;
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default:
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if (saved_kind >= 16) {
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printf("%s %d", EXCEPTION_NAMES_TABLE[11], saved_kind - 16);
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} else {
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printf(EXCEPTION_NAMES_TABLE[0]);
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}
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break;
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}
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printf(" exception caught:\n");
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printf("R0: %08X R1: %08X R2: %08X R3: %08X\n", registers_copy[0], registers_copy[1], registers_copy[2], registers_copy[3]);
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printf("R4: %08X R5: %08X R6: %08X R7: %08X\n", registers_copy[4], registers_copy[5], registers_copy[6], registers_copy[7]);
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printf("R8: %08X R9: %08X R10: %08X R11: %08X\n", registers_copy[8], registers_copy[9], registers_copy[10], registers_copy[11]);
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printf("R12: %08X R13: %08X R14: %08X R15: %08X\n", registers_copy[12], registers_copy[13], registers_copy[14], registers_copy[15]);
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printf("xPSR: %08X\n", registers_copy[16]);
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for (;;) {}
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}
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__attribute__((naked)) NORETURN void NMI_Handler(void) {
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exception_handler(NMI);
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}
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__attribute__((naked)) NORETURN void HardFault_Handler(void) {
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exception_handler(HARD_FAULT);
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}
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__attribute__((naked)) NORETURN void MemManage_Handler(void) {
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exception_handler(MEM_MANAGE);
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}
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__attribute__((naked)) NORETURN void BusFault_Handler(void) {
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exception_handler(BUS_FAULT);
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}
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__attribute__((naked)) NORETURN void UsageFault_Handler(void) {
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exception_handler(USAGE_FAULT);
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}
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__attribute__((naked)) NORETURN void SVC_Handler(void) {
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exception_handler(SV_CALL);
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}
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__attribute__((naked)) NORETURN void DebugMon_Handler(void) {
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exception_handler(DEBUG_MONITOR);
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}
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__attribute__((naked)) NORETURN void PendSV_Handler(void) {
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exception_handler(PENDING_SV);
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}
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__attribute__((naked)) NORETURN void SysTick_Handler(void) {
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exception_handler(SYSTEM_TICK);
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}
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#endif

‎ports/qemu/mcu/arm/startup.c

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@@ -28,6 +28,8 @@
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#include <stdio.h>
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#include <stdlib.h>
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#include "py/runtime.h"
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#include "shared/runtime/semihosting_arm.h"
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#include "uart.h"
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_start();
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}
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void Default_Handler(void) {
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NORETURN void Default_Handler(void) {
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for (;;) {
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}
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}
@@ -74,25 +76,35 @@ __attribute__((naked, section(".isr_vector"))) void isr_vector(void) {
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#elif defined(__ARM_ARCH_ISA_THUMB)
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extern void NMI_Handler(void);
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extern void HardFault_Handler(void);
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extern void MemManage_Handler(void);
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extern void BusFault_Handler(void);
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extern void UsageFault_Handler(void);
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extern void SVC_Handler(void);
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extern void DebugMon_Handler(void);
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extern void PendSV_Handler(void);
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extern void SysTick_Handler(void);
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// ARM architecture with Thumb-only ISA.
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const uint32_t isr_vector[] __attribute__((section(".isr_vector"))) = {
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(uint32_t)&_estack,
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(uint32_t)&Reset_Handler,
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(uint32_t)&Default_Handler, // NMI_Handler
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(uint32_t)&Default_Handler, // HardFault_Handler
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(uint32_t)&Default_Handler, // MemManage_Handler
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(uint32_t)&Default_Handler, // BusFault_Handler
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(uint32_t)&Default_Handler, // UsageFault_Handler
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(uint32_t)&NMI_Handler,
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(uint32_t)&HardFault_Handler,
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(uint32_t)&MemManage_Handler,
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(uint32_t)&BusFault_Handler,
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(uint32_t)&UsageFault_Handler,
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0,
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0,
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0,
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0,
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(uint32_t)&Default_Handler, // SVC_Handler
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(uint32_t)&Default_Handler, // DebugMon_Handler
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(uint32_t)&SVC_Handler,
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(uint32_t)&DebugMon_Handler,
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0,
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(uint32_t)&Default_Handler, // PendSV_Handler
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(uint32_t)&Default_Handler, // SysTick_Handler
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(uint32_t)&PendSV_Handler,
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(uint32_t)&SysTick_Handler,
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};
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#endif

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