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44 | 44 | #include "soc/mcpwm_struct.h"
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45 | 45 | #include "rom/lldesc.h"
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46 | 46 |
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47 |
| -static void setupTimer(void) { |
48 |
| - // invert OE-PWM output |
49 |
| - mcpwm_gpio_init(MCPWM_UNIT_0, MCPWM0A, GPIO_PWM0A_OUT); |
50 |
| - gpio_matrix_out(GPIO_PWM0A_OUT, PWM0_OUT0A_IDX, true, false); |
51 |
| - |
52 |
| - // setup GPIO for sync from OE-DMA (invert signal) |
53 |
| - mcpwm_gpio_init(MCPWM_UNIT_0, MCPWM_SYNC_0, GPIO_SYNC0_IN); |
54 |
| - gpio_matrix_in(GPIO_SYNC0_IN, PWM0_SYNC0_IN_IDX, true); |
55 |
| - gpio_pulldown_en(GPIO_SYNC0_IN); //Enable pull down on SYNC0 signal |
56 |
| - |
57 |
| - // can't use the library function directly as library has hardcoded large prescale values |
58 |
| - //mcpwm_init(MCPWM_UNIT_0, MCPWM_TIMER_0, &pwm_config); //Configure PWM0A & PWM0B with above settings |
59 |
| - |
60 |
| - mcpwm_unit_t mcpwm_num = MCPWM_UNIT_0; |
61 |
| - mcpwm_timer_t timer_num = MCPWM_TIMER_0; |
62 |
| - |
63 |
| - //esp_err_t mcpwm_init(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpwm_config_t *mcpwm_conf) |
64 |
| - { |
65 |
| - |
66 |
| - #define MATRIX_MCPWM_CLK_PRESCL 0 //MCPWM clock prescale |
67 |
| - #define MATRIX_TIMER_CLK_PRESCALE 0 //MCPWM timer prescales |
68 |
| - #define MATRIX_MCPWM_BASE_CLK (2 * APB_CLK_FREQ) //2*APB_CLK_FREQ 160Mhz |
69 |
| - #define MATRIX_MCPWM_CLK (MATRIX_MCPWM_BASE_CLK/(MATRIX_MCPWM_CLK_PRESCL +1)) |
70 |
| - |
71 |
| - mcpwm_dev_t *MCPWM[2] = {&MCPWM0, &MCPWM1}; |
72 |
| - |
73 |
| - periph_module_enable((periph_module_t)(PERIPH_PWM0_MODULE + mcpwm_num)); |
74 |
| - MCPWM[mcpwm_num]->clk_cfg.prescale = MATRIX_MCPWM_CLK_PRESCL; |
75 |
| - |
76 |
| - // set period to max, we never intend for it to wrap, compa to 4 ticks (~25 ns, around the lowest visible OE pulse) |
77 |
| - MCPWM[mcpwm_num]->timer[timer_num].period.prescale = MATRIX_TIMER_CLK_PRESCALE; |
78 |
| - MCPWM[mcpwm_num]->timer[timer_num].period.period = 0xFFFF; |
79 |
| - MCPWM[mcpwm_num]->timer[timer_num].period.upmethod = 0; |
80 |
| - MCPWM[mcpwm_num]->channel[timer_num].cmpr_value[0].cmpr_val = 4; |
81 |
| - MCPWM[mcpwm_num]->channel[timer_num].cmpr_cfg.a_upmethod = 0; |
82 |
| - |
83 |
| - MCPWM[mcpwm_num]->timer[timer_num].mode.mode = MCPWM_UP_COUNTER; |
84 |
| - mcpwm_set_duty_type(mcpwm_num, timer_num, MCPWM_OPR_A, MCPWM_DUTY_MODE_0); |
85 |
| - |
86 |
| - mcpwm_start(mcpwm_num, timer_num); |
87 |
| - MCPWM[mcpwm_num]->timer_sel.operator0_sel = 0; |
88 |
| - MCPWM[mcpwm_num]->timer_sel.operator1_sel = 1; |
89 |
| - MCPWM[mcpwm_num]->timer_sel.operator2_sel = 2; |
90 |
| - MCPWM[mcpwm_num]->update_cfg.global_up_en = 1; |
91 |
| - MCPWM[mcpwm_num]->update_cfg.global_force_up = 1; |
92 |
| - MCPWM[mcpwm_num]->update_cfg.global_force_up = 0; |
93 |
| - } |
94 |
| - |
95 |
| - //6. Syncronization configuration |
96 |
| - mcpwm_sync_enable(MCPWM_UNIT_0, MCPWM_TIMER_0, MCPWM_SELECT_SYNC0, 0); //Load counter value with 20% of period counter of mcpwm timer 1 when sync 0 occurs |
97 |
| -} |
98 |
| - |
99 |
| - |
100 |
| - |
101 | 47 | #define INLINE __attribute__( ( always_inline ) ) inline
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102 | 48 |
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103 | 49 |
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@@ -213,8 +159,6 @@ void SmartMatrix3RefreshMultiplexed<refreshDepth, matrixWidth, matrixHeight, pan
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213 | 159 | gpio_set_level(DEBUG_1_GPIO, 0);
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214 | 160 | #endif
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215 | 161 |
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216 |
| - setupTimer(); |
217 |
| - |
218 | 162 | // calculate the lowest LSBMSB_TRANSITION_BIT value that will fit in memory
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219 | 163 | int numDescriptorsPerRow;
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220 | 164 | lsbMsbTransitionBit = 0;
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