Skip to content
This repository was archived by the owner on Nov 7, 2022. It is now read-only.

Commit 91949e7

Browse files
Merge pull request #29 from rust-embedded/switch_to_tock_registers
Switch from register-rs to tock-registers
2 parents 715ea1f + bdb7f78 commit 91949e7

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

56 files changed

+790
-290
lines changed

.editorconfig

+25
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
# editorconfig.org
2+
3+
root = true
4+
5+
[*]
6+
charset = utf-8
7+
end_of_line = lf
8+
insert_final_newline = true
9+
indent_style = space
10+
trim_trailing_whitespace = true
11+
max_line_length = 100
12+
13+
[Makefile]
14+
indent_style = tab
15+
indent_size = 8
16+
17+
[*.rs]
18+
indent_size = 4
19+
20+
[*.s]
21+
indent_style = tab
22+
indent_size = 8
23+
24+
[*.toml]
25+
indent_size = 4

.vscode/settings.json

+5-5
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,8 @@
33
"editor.rulers": [
44
100
55
],
6-
"rust-analyzer.checkOnSave.extraArgs": [
7-
"--target=aarch64-unknown-none-softfloat"
8-
],
9-
"rust-analyzer.checkOnSave.allTargets": false
10-
}
6+
"rust-analyzer.checkOnSave.allTargets": false,
7+
"rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
8+
"rust-analyzer.lens.debug": false,
9+
"rust-analyzer.lens.run": false
10+
}

Cargo.toml

+7-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
[package]
22
name = "cortex-a"
3-
version = "5.1.6"
3+
version = "6.0.0"
44
authors = ["Andre Richter <[email protected]>"]
55
description = "Low level access to Cortex-A processors"
66
homepage = "https://github.com/rust-embedded/cortex-a"
@@ -11,8 +11,13 @@ categories = ["embedded", "hardware-support", "no-std"]
1111
license = "MIT/Apache-2.0"
1212
edition = "2018"
1313
exclude = [
14+
".github",
15+
".gitignore",
16+
".rustfmt.toml",
17+
".vscode",
18+
".editorconfig",
1419
"Makefile"
1520
]
1621

1722
[dependencies]
18-
register = "1.x.x"
23+
tock-registers = { version = "0.7.x", default-features = false } # Use it as interface-only library.

Makefile

-4
Original file line numberDiff line numberDiff line change
@@ -8,10 +8,6 @@ clippy:
88
cargo clippy --target $(TARGET)
99
cargo clippy
1010

11-
check:
12-
cargo check --target $(TARGET)
13-
cargo check
14-
1511
fmt:
1612
cargo fmt
1713

README.md

+36-4
Original file line numberDiff line numberDiff line change
@@ -5,21 +5,53 @@
55

66
Low level access to Cortex-A processors.
77

8-
## Currently Supported Architectures
8+
## Currently Supported Execution States
99

1010
- [x] AArch64
1111
- [ ] AArch32
1212

1313
## Minimum Supported Rust Version
1414

15-
Requires rustc 1.45.0 or later due to use of the new `asm!()` syntax.
15+
Requires a recent nightly of Rust.
1616

1717
## Usage
1818

19-
Example from https://github.com/rust-embedded/rust-raspi3-OS-tutorials
19+
Please note that for using this crate's [register definitions](src/registers) (as provided by
20+
`cortex_a::registers::*`), you need to also include
21+
[`tock-registers`](https://crates.io/crates/tock-registers) in your project. This is because the
22+
`interface` traits provided by `tock-registers` are implemented by this crate. You should include
23+
the same version of `tock-registers` as is being used by this crate to ensure sane
24+
interoperatbility.
25+
26+
For example, in the following snippet, `X.Y.Z` should be the same version of `tock-registers` that
27+
is mentioned in `cortex-a`'s [`Cargo.toml`](Cargo.toml).
28+
29+
```toml
30+
[package]
31+
name = "Your embedded project"
32+
33+
# Some parts omitted for brevity.
34+
35+
[dependencies]
36+
tock-registers = "X.Y.Z"
37+
cortex-a = "A.B.C" # <-- Includes tock-registers itself.
38+
```
39+
40+
### Example
41+
42+
Check out https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials for usage examples. Listed
43+
below is a snippet of `rust-raspberrypi-OS-tutorials`'s early boot code.
2044

2145
```rust
22-
unsafe fn el2_to_el1_transition() -> ! {
46+
use cortex_a::{asm, registers::*};
47+
use tock_registers::interfaces::Writeable; // <-- Trait needed to use `write()` and `set()`.
48+
49+
// Some parts omitted for brevity.
50+
51+
unsafe fn prepare_el2_to_el1_transition(
52+
virt_boot_core_stack_end_exclusive_addr: u64,
53+
virt_kernel_init_addr: u64,
54+
) {
2355
// Enable timer counter registers for EL1.
2456
CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
2557

src/asm.rs

+7-5
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,9 @@
66
// - Jorge Aparicio
77
// - Andre Richter <[email protected]>
88

9-
//! Miscellaneous assembly instructions
9+
//! Wrappers around ARMv8-A instructions.
10+
11+
pub mod barrier;
1012

1113
/// The classic no-op
1214
#[inline(always)]
@@ -22,7 +24,7 @@ pub fn nop() {
2224

2325
/// Wait For Interrupt
2426
///
25-
/// For more details on wfi, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html)
27+
/// For more details on wfi, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html).
2628
#[inline(always)]
2729
pub fn wfi() {
2830
#[cfg(target_arch = "aarch64")]
@@ -36,7 +38,7 @@ pub fn wfi() {
3638

3739
/// Wait For Event
3840
///
39-
/// For more details of wfe - sev pair, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html)
41+
/// For more details of wfe - sev pair, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html).
4042
#[inline(always)]
4143
pub fn wfe() {
4244
#[cfg(target_arch = "aarch64")]
@@ -52,7 +54,7 @@ pub fn wfe() {
5254
///
5355
/// SEV causes an event to be signaled to the local core within a multiprocessor system.
5456
///
55-
/// For more details of wfe - sev/sevl pair, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html)
57+
/// For more details of wfe - sev/sevl pair, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html).
5658
#[inline(always)]
5759
pub fn sevl() {
5860
#[cfg(target_arch = "aarch64")]
@@ -68,7 +70,7 @@ pub fn sevl() {
6870
///
6971
/// SEV causes an event to be signaled to all cores within a multiprocessor system.
7072
///
71-
/// For more details of wfe - sev pair, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html)
73+
/// For more details of wfe - sev pair, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html).
7274
#[inline(always)]
7375
pub fn sev() {
7476
#[cfg(target_arch = "aarch64")]

src/barrier.rs renamed to src/asm/barrier.rs

+1-4
Original file line numberDiff line numberDiff line change
@@ -5,10 +5,7 @@
55
// Author(s):
66
// - Andre Richter <[email protected]>
77

8-
// Borrow implementations from the pending upstream ACLE implementation until it is merged.
9-
// Afterwards, we'll probably just reexport them, hoping that the API doesn't change.
10-
//
11-
// https://github.com/rust-lang-nursery/stdsimd/pull/557
8+
//! Barrier functions.
129
1310
mod sealed {
1411
pub trait Dmb {

src/lib.rs

+44-9
Original file line numberDiff line numberDiff line change
@@ -7,17 +7,53 @@
77

88
//! Low level access to Cortex-A processors.
99
//!
10-
//! ## Currently Supported Architectures
10+
//! ## Currently Supported Execution States
1111
//!
1212
//! - [x] AArch64
1313
//! - [ ] AArch32
1414
//!
15+
//! ## Minimum Supported Rust Version
16+
//!
17+
//! Requires a recent nightly of Rust.
18+
//!
1519
//! ## Usage
1620
//!
17-
//! Example from https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials
21+
//! Please note that for using this crate's [register definitions](src/registers) (as provided by
22+
//! `cortex_a::registers::*`), you need to also include
23+
//! [`tock-registers`](https://crates.io/crates/tock-registers) in your project. This is because the
24+
//! `interface` traits provided by `tock-registers` are implemented by this crate. You should
25+
//! include the same version of `tock-registers` as is being used by this crate to ensure sane
26+
//! interoperatbility.
27+
//!
28+
//! For example, in the following snippet, `X.Y.Z` should be the same version of `tock-registers`
29+
//! that is mentioned in `cortex-a`'s [`Cargo.toml`](Cargo.toml).
30+
//!
31+
//! ```toml
32+
//! [package]
33+
//! name = "Your embedded project"
34+
//!
35+
//! # Some parts omitted for brevity.
36+
//!
37+
//! [dependencies]
38+
//! tock-registers = "X.Y.Z"
39+
//! cortex-a = "A.B.C" # <-- Includes tock-registers itself.
40+
//! ```
41+
//!
42+
//! ### Example
43+
//!
44+
//! Check out https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials for usage examples.
45+
//! Listed below is a snippet of `rust-raspberrypi-OS-tutorials`'s early boot code.
1846
//!
1947
//! ```rust
20-
//! unsafe fn el2_to_el1_transition() -> ! {
48+
//! use cortex_a::{asm, registers::*};
49+
//! use tock_registers::interfaces::Writeable; // <-- Trait needed to use `write()` and `set()`.
50+
//!
51+
//! // Some parts omitted for brevity.
52+
//!
53+
//! unsafe fn prepare_el2_to_el1_transition(
54+
//! virt_boot_core_stack_end_exclusive_addr: u64,
55+
//! virt_kernel_init_addr: u64,
56+
//! ) {
2157
//! // Enable timer counter registers for EL1.
2258
//! CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
2359
//!
@@ -39,15 +75,14 @@
3975
//!
4076
//! ## Disclaimer
4177
//!
42-
//! Descriptive comments in the source files are taken from the
43-
//! [ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile](https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf?_ga=2.266626254.1122218691.1534883460-1326731866.1530967873).
78+
//! Descriptive comments in the source files are taken from the [ARM Architecture Reference Manual
79+
//! ARMv8, for ARMv8-A architecture
80+
//! profile](https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf?_ga=2.266626254.1122218691.1534883460-1326731866.1530967873).
4481
45-
#![allow(clippy::clippy::upper_case_acronyms)]
82+
#![feature(asm)]
4683
#![feature(core_intrinsics)]
4784
#![feature(custom_inner_attributes)]
48-
#![feature(asm)]
4985
#![no_std]
5086

5187
pub mod asm;
52-
pub mod barrier;
53-
pub mod regs;
88+
pub mod registers;

src/registers.rs

+99
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,99 @@
1+
//! Processor core registers
2+
3+
#![allow(unused_attributes)]
4+
#![rustfmt::skip]
5+
6+
#[macro_use]
7+
mod macros;
8+
9+
mod cntfrq_el0;
10+
mod cnthctl_el2;
11+
mod cntp_ctl_el0;
12+
mod cntp_tval_el0;
13+
mod cntpct_el0;
14+
mod cntv_ctl_el0;
15+
mod cntv_tval_el0;
16+
mod cntvct_el0;
17+
mod cntvoff_el2;
18+
mod currentel;
19+
mod daif;
20+
mod elr_el1;
21+
mod elr_el2;
22+
mod elr_el3;
23+
mod esr_el1;
24+
mod esr_el2;
25+
mod far_el1;
26+
mod far_el2;
27+
mod hcr_el2;
28+
mod id_aa64mmfr0_el1;
29+
mod lr;
30+
mod mair_el1;
31+
mod mair_el2;
32+
mod midr_el1;
33+
mod mpidr_el1;
34+
mod par_el1;
35+
mod scr_el3;
36+
mod sctlr_el1;
37+
mod sctlr_el2;
38+
mod sp;
39+
mod sp_el0;
40+
mod sp_el1;
41+
mod spsel;
42+
mod spsr_el1;
43+
mod spsr_el2;
44+
mod spsr_el3;
45+
mod tcr_el1;
46+
mod tcr_el2;
47+
mod tpidr_el0;
48+
mod tpidr_el1;
49+
mod tpidrro_el0;
50+
mod ttbr0_el1;
51+
mod ttbr0_el2;
52+
mod ttbr1_el1;
53+
mod vbar_el1;
54+
55+
pub use cntfrq_el0::CNTFRQ_EL0;
56+
pub use cnthctl_el2::CNTHCTL_EL2;
57+
pub use cntp_ctl_el0::CNTP_CTL_EL0;
58+
pub use cntp_tval_el0::CNTP_TVAL_EL0;
59+
pub use cntpct_el0::CNTPCT_EL0;
60+
pub use cntv_ctl_el0::CNTV_CTL_EL0;
61+
pub use cntv_tval_el0::CNTV_TVAL_EL0;
62+
pub use cntvct_el0::CNTVCT_EL0;
63+
pub use cntvoff_el2::CNTVOFF_EL2;
64+
pub use currentel::CurrentEL;
65+
pub use daif::DAIF;
66+
pub use elr_el1::ELR_EL1;
67+
pub use elr_el2::ELR_EL2;
68+
pub use elr_el3::ELR_EL3;
69+
pub use esr_el1::ESR_EL1;
70+
pub use esr_el2::ESR_EL2;
71+
pub use far_el1::FAR_EL1;
72+
pub use far_el2::FAR_EL2;
73+
pub use hcr_el2::HCR_EL2;
74+
pub use id_aa64mmfr0_el1::ID_AA64MMFR0_EL1;
75+
pub use lr::LR;
76+
pub use mair_el1::MAIR_EL1;
77+
pub use mair_el2::MAIR_EL2;
78+
pub use midr_el1::MIDR_EL1;
79+
pub use mpidr_el1::MPIDR_EL1;
80+
pub use par_el1::PAR_EL1;
81+
pub use scr_el3::SCR_EL3;
82+
pub use sctlr_el1::SCTLR_EL1;
83+
pub use sctlr_el2::SCTLR_EL2;
84+
pub use sp::SP;
85+
pub use sp_el0::SP_EL0;
86+
pub use sp_el1::SP_EL1;
87+
pub use spsel::SPSel;
88+
pub use spsr_el1::SPSR_EL1;
89+
pub use spsr_el2::SPSR_EL2;
90+
pub use spsr_el3::SPSR_EL3;
91+
pub use tcr_el1::TCR_EL1;
92+
pub use tcr_el2::TCR_EL2;
93+
pub use tpidr_el0::TPIDR_EL0;
94+
pub use tpidr_el1::TPIDR_EL1;
95+
pub use tpidrro_el0::TPIDRRO_EL0;
96+
pub use ttbr0_el1::TTBR0_EL1;
97+
pub use ttbr0_el2::TTBR0_EL2;
98+
pub use ttbr1_el1::TTBR1_EL1;
99+
pub use vbar_el1::VBAR_EL1;

src/regs/cntfrq_el0.rs renamed to src/registers/cntfrq_el0.rs

+6-3
Original file line numberDiff line numberDiff line change
@@ -11,12 +11,15 @@
1111
//! must be programmed with this value as part of system initialization. The value of the register
1212
//! is not interpreted by hardware.
1313
14-
use register::cpu::RegisterReadOnly;
14+
use tock_registers::interfaces::Readable;
1515

1616
pub struct Reg;
1717

18-
impl RegisterReadOnly<u64, ()> for Reg {
18+
impl Readable for Reg {
19+
type T = u64;
20+
type R = ();
21+
1922
sys_coproc_read_raw!(u64, "CNTFRQ_EL0", "x");
2023
}
2124

22-
pub static CNTFRQ_EL0: Reg = Reg {};
25+
pub const CNTFRQ_EL0: Reg = Reg {};

0 commit comments

Comments
 (0)