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Merge #385
385: remove the ptr() function in favor of the PTR constant r=adamgreig a=TDHolmes Per #370/#235, the const fn ptr() was supposed to be deprecated and subsequently removed. This PR removes it for the master branch tracking the 0.8 release Co-authored-by: Tyler Holmes <[email protected]>
2 parents ef049c9 + d1ba03e commit 92552c7

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‎CHANGELOG.md

+3
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
2121
### Fixed
2222
- Fixed `singleton!()` statics sometimes ending up in `.data` instead of `.bss` (#364, #380).
2323

24+
### Removed
25+
- removed all peripherals `ptr()` functions in favor of the associated constant `PTR` (#385).
26+
2427
## [v0.7.4] - 2021-12-31
2528

2629
### Added

‎panic-itm/CHANGELOG.md

+5
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
77

88
## [Unreleased]
99

10+
### Changed
11+
12+
- switched from `ITM::ptr()` to `ITM::PTR` as `ptr()` has been
13+
deprecated/removed (#385).
14+
1015
## [v0.4.2] - 2020-11-14
1116

1217
- Support cortex-m v0.7.0

‎panic-itm/src/lib.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,7 @@ use cortex_m::peripheral::ITM;
4646
fn panic(info: &PanicInfo) -> ! {
4747
interrupt::disable();
4848

49-
let itm = unsafe { &mut *ITM::ptr() };
49+
let itm = unsafe { &mut *ITM::PTR };
5050
let stim = &mut itm.stim[0];
5151

5252
iprintln!(stim, "{}", info);

‎src/itm.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -128,7 +128,7 @@ pub fn write_all(port: &mut Stim, buffer: &[u8]) {
128128
///
129129
/// ```no_run
130130
/// # use cortex_m::{itm::{self, Aligned}, peripheral::ITM};
131-
/// # let port = unsafe { &mut (*ITM::ptr()).stim[0] };
131+
/// # let port = unsafe { &mut (*ITM::PTR).stim[0] };
132132
/// let mut buffer = Aligned([0; 14]);
133133
///
134134
/// buffer.0.copy_from_slice(b"Hello, world!\n");

‎src/peripheral/cpuid.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,7 @@ impl CPUID {
122122
pub fn cache_dminline() -> u32 {
123123
const CTR_DMINLINE_POS: u32 = 16;
124124
const CTR_DMINLINE_MASK: u32 = 0xF << CTR_DMINLINE_POS;
125-
let ctr = unsafe { (*Self::ptr()).ctr.read() };
125+
let ctr = unsafe { (*Self::PTR).ctr.read() };
126126
(ctr & CTR_DMINLINE_MASK) >> CTR_DMINLINE_POS
127127
}
128128

@@ -134,7 +134,7 @@ impl CPUID {
134134
pub fn cache_iminline() -> u32 {
135135
const CTR_IMINLINE_POS: u32 = 0;
136136
const CTR_IMINLINE_MASK: u32 = 0xF << CTR_IMINLINE_POS;
137-
let ctr = unsafe { (*Self::ptr()).ctr.read() };
137+
let ctr = unsafe { (*Self::PTR).ctr.read() };
138138
(ctr & CTR_IMINLINE_MASK) >> CTR_IMINLINE_POS
139139
}
140140
}

‎src/peripheral/dcb.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ impl DCB {
7474
pub fn is_debugger_attached() -> bool {
7575
unsafe {
7676
// do an 8-bit read of the 32-bit DHCSR register, and get the LSB
77-
let value = ptr::read_volatile(Self::ptr() as *const u8);
77+
let value = ptr::read_volatile(Self::PTR as *const u8);
7878
value & 0x1 == 1
7979
}
8080
}

‎src/peripheral/dwt.rs

+7-7
Original file line numberDiff line numberDiff line change
@@ -214,7 +214,7 @@ impl DWT {
214214
#[inline]
215215
pub fn cycle_count() -> u32 {
216216
// NOTE(unsafe) atomic read with no side effects
217-
unsafe { (*Self::ptr()).cyccnt.read() }
217+
unsafe { (*Self::PTR).cyccnt.read() }
218218
}
219219

220220
/// Set the cycle count
@@ -231,7 +231,7 @@ impl DWT {
231231
#[inline]
232232
pub fn unlock() {
233233
// NOTE(unsafe) atomic write to a stateless, write-only register
234-
unsafe { (*Self::ptr()).lar.write(0xC5AC_CE55) }
234+
unsafe { (*Self::PTR).lar.write(0xC5AC_CE55) }
235235
}
236236

237237
/// Get the CPI count
@@ -245,7 +245,7 @@ impl DWT {
245245
#[inline]
246246
pub fn cpi_count() -> u8 {
247247
// NOTE(unsafe) atomic read with no side effects
248-
unsafe { (*Self::ptr()).cpicnt.read() as u8 }
248+
unsafe { (*Self::PTR).cpicnt.read() as u8 }
249249
}
250250

251251
/// Set the CPI count
@@ -260,7 +260,7 @@ impl DWT {
260260
#[inline]
261261
pub fn exception_count() -> u8 {
262262
// NOTE(unsafe) atomic read with no side effects
263-
unsafe { (*Self::ptr()).exccnt.read() as u8 }
263+
unsafe { (*Self::PTR).exccnt.read() as u8 }
264264
}
265265

266266
/// Set the exception count
@@ -281,7 +281,7 @@ impl DWT {
281281
#[inline]
282282
pub fn sleep_count() -> u8 {
283283
// NOTE(unsafe) atomic read with no side effects
284-
unsafe { (*Self::ptr()).sleepcnt.read() as u8 }
284+
unsafe { (*Self::PTR).sleepcnt.read() as u8 }
285285
}
286286

287287
/// Set the sleep count
@@ -296,7 +296,7 @@ impl DWT {
296296
#[inline]
297297
pub fn lsu_count() -> u8 {
298298
// NOTE(unsafe) atomic read with no side effects
299-
unsafe { (*Self::ptr()).lsucnt.read() as u8 }
299+
unsafe { (*Self::PTR).lsucnt.read() as u8 }
300300
}
301301

302302
/// Set the lsu count
@@ -313,7 +313,7 @@ impl DWT {
313313
#[inline]
314314
pub fn fold_count() -> u8 {
315315
// NOTE(unsafe) atomic read with no side effects
316-
unsafe { (*Self::ptr()).foldcnt.read() as u8 }
316+
unsafe { (*Self::PTR).foldcnt.read() as u8 }
317317
}
318318

319319
/// Set the folded instruction count

‎src/peripheral/mod.rs

+1-91
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@
5050
//! } // all the peripheral singletons are destroyed here
5151
//!
5252
//! // actually safe because this is an atomic read with no side effects
53-
//! let cyccnt = unsafe { (*DWT::ptr()).cyccnt.read() };
53+
//! let cyccnt = unsafe { (*DWT::PTR).cyccnt.read() };
5454
//! ```
5555
//!
5656
//! # References
@@ -244,12 +244,6 @@ unsafe impl Send for AC {}
244244
impl AC {
245245
/// Pointer to the register block
246246
pub const PTR: *const self::ac::RegisterBlock = 0xE000_EF90 as *const _;
247-
248-
/// Returns a pointer to the register block (to be deprecated in 0.7)
249-
#[inline(always)]
250-
pub const fn ptr() -> *const self::ac::RegisterBlock {
251-
Self::PTR
252-
}
253247
}
254248

255249
/// Cache and branch predictor maintenance operations
@@ -271,12 +265,6 @@ impl CBP {
271265

272266
/// Pointer to the register block
273267
pub const PTR: *const self::cbp::RegisterBlock = 0xE000_EF50 as *const _;
274-
275-
/// Returns a pointer to the register block (to be deprecated in 0.7)
276-
#[inline(always)]
277-
pub const fn ptr() -> *const self::cbp::RegisterBlock {
278-
Self::PTR
279-
}
280268
}
281269

282270
#[cfg(not(armv6m))]
@@ -300,12 +288,6 @@ unsafe impl Send for CPUID {}
300288
impl CPUID {
301289
/// Pointer to the register block
302290
pub const PTR: *const self::cpuid::RegisterBlock = 0xE000_ED00 as *const _;
303-
304-
/// Returns a pointer to the register block (to be deprecated in 0.7)
305-
#[inline(always)]
306-
pub const fn ptr() -> *const self::cpuid::RegisterBlock {
307-
Self::PTR
308-
}
309291
}
310292

311293
impl ops::Deref for CPUID {
@@ -328,12 +310,6 @@ unsafe impl Send for DCB {}
328310
impl DCB {
329311
/// Pointer to the register block
330312
pub const PTR: *const dcb::RegisterBlock = 0xE000_EDF0 as *const _;
331-
332-
/// Returns a pointer to the register block (to be deprecated in 0.7)
333-
#[inline(always)]
334-
pub const fn ptr() -> *const dcb::RegisterBlock {
335-
Self::PTR
336-
}
337313
}
338314

339315
impl ops::Deref for DCB {
@@ -356,12 +332,6 @@ unsafe impl Send for DWT {}
356332
impl DWT {
357333
/// Pointer to the register block
358334
pub const PTR: *const dwt::RegisterBlock = 0xE000_1000 as *const _;
359-
360-
/// Returns a pointer to the register block (to be deprecated in 0.7)
361-
#[inline(always)]
362-
pub const fn ptr() -> *const dwt::RegisterBlock {
363-
Self::PTR
364-
}
365335
}
366336

367337
impl ops::Deref for DWT {
@@ -385,12 +355,6 @@ unsafe impl Send for FPB {}
385355
impl FPB {
386356
/// Pointer to the register block
387357
pub const PTR: *const fpb::RegisterBlock = 0xE000_2000 as *const _;
388-
389-
/// Returns a pointer to the register block (to be deprecated in 0.7)
390-
#[inline(always)]
391-
pub const fn ptr() -> *const fpb::RegisterBlock {
392-
Self::PTR
393-
}
394358
}
395359

396360
#[cfg(not(armv6m))]
@@ -415,12 +379,6 @@ unsafe impl Send for FPU {}
415379
impl FPU {
416380
/// Pointer to the register block
417381
pub const PTR: *const fpu::RegisterBlock = 0xE000_EF30 as *const _;
418-
419-
/// Returns a pointer to the register block (to be deprecated in 0.7)
420-
#[inline(always)]
421-
pub const fn ptr() -> *const fpu::RegisterBlock {
422-
Self::PTR
423-
}
424382
}
425383

426384
#[cfg(any(has_fpu, native))]
@@ -449,12 +407,6 @@ unsafe impl Send for ICB {}
449407
impl ICB {
450408
/// Pointer to the register block
451409
pub const PTR: *mut icb::RegisterBlock = 0xE000_E004 as *mut _;
452-
453-
/// Returns a pointer to the register block (to be deprecated in 0.7)
454-
#[inline(always)]
455-
pub const fn ptr() -> *mut icb::RegisterBlock {
456-
Self::PTR
457-
}
458410
}
459411

460412
impl ops::Deref for ICB {
@@ -485,12 +437,6 @@ unsafe impl Send for ITM {}
485437
impl ITM {
486438
/// Pointer to the register block
487439
pub const PTR: *mut itm::RegisterBlock = 0xE000_0000 as *mut _;
488-
489-
/// Returns a pointer to the register block (to be deprecated in 0.7)
490-
#[inline(always)]
491-
pub const fn ptr() -> *mut itm::RegisterBlock {
492-
Self::PTR
493-
}
494440
}
495441

496442
#[cfg(all(not(armv6m), not(armv8m_base)))]
@@ -522,12 +468,6 @@ unsafe impl Send for MPU {}
522468
impl MPU {
523469
/// Pointer to the register block
524470
pub const PTR: *const mpu::RegisterBlock = 0xE000_ED90 as *const _;
525-
526-
/// Returns a pointer to the register block (to be deprecated in 0.7)
527-
#[inline(always)]
528-
pub const fn ptr() -> *const mpu::RegisterBlock {
529-
Self::PTR
530-
}
531471
}
532472

533473
impl ops::Deref for MPU {
@@ -550,12 +490,6 @@ unsafe impl Send for NVIC {}
550490
impl NVIC {
551491
/// Pointer to the register block
552492
pub const PTR: *const nvic::RegisterBlock = 0xE000_E100 as *const _;
553-
554-
/// Returns a pointer to the register block (to be deprecated in 0.7)
555-
#[inline(always)]
556-
pub const fn ptr() -> *const nvic::RegisterBlock {
557-
Self::PTR
558-
}
559493
}
560494

561495
impl ops::Deref for NVIC {
@@ -579,12 +513,6 @@ unsafe impl Send for SAU {}
579513
impl SAU {
580514
/// Pointer to the register block
581515
pub const PTR: *const sau::RegisterBlock = 0xE000_EDD0 as *const _;
582-
583-
/// Returns a pointer to the register block (to be deprecated in 0.7)
584-
#[inline(always)]
585-
pub const fn ptr() -> *const sau::RegisterBlock {
586-
Self::PTR
587-
}
588516
}
589517

590518
#[cfg(armv8m)]
@@ -608,12 +536,6 @@ unsafe impl Send for SCB {}
608536
impl SCB {
609537
/// Pointer to the register block
610538
pub const PTR: *const scb::RegisterBlock = 0xE000_ED04 as *const _;
611-
612-
/// Returns a pointer to the register block (to be deprecated in 0.7)
613-
#[inline(always)]
614-
pub const fn ptr() -> *const scb::RegisterBlock {
615-
Self::PTR
616-
}
617539
}
618540

619541
impl ops::Deref for SCB {
@@ -636,12 +558,6 @@ unsafe impl Send for SYST {}
636558
impl SYST {
637559
/// Pointer to the register block
638560
pub const PTR: *const syst::RegisterBlock = 0xE000_E010 as *const _;
639-
640-
/// Returns a pointer to the register block (to be deprecated in 0.7)
641-
#[inline(always)]
642-
pub const fn ptr() -> *const syst::RegisterBlock {
643-
Self::PTR
644-
}
645561
}
646562

647563
impl ops::Deref for SYST {
@@ -665,12 +581,6 @@ unsafe impl Send for TPIU {}
665581
impl TPIU {
666582
/// Pointer to the register block
667583
pub const PTR: *const tpiu::RegisterBlock = 0xE004_0000 as *const _;
668-
669-
/// Returns a pointer to the register block (to be deprecated in 0.7)
670-
#[inline(always)]
671-
pub const fn ptr() -> *const tpiu::RegisterBlock {
672-
Self::PTR
673-
}
674584
}
675585

676586
#[cfg(not(armv6m))]

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