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Replace if with conditional compilation
- Replace fmvp.d.x usage with fcvt.d.w as it does not require zfa
1 parent 7a2f905 commit 49b5588

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riscv-rt/src/lib.rs

+8-10
Original file line numberDiff line numberDiff line change
@@ -524,16 +524,14 @@ pub unsafe extern "C" fn start_rust(a0: usize, a1: usize, a2: usize) -> ! {
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core::arch::asm!("fscsr x0"); // Zero out fcsr register csrrw x0, fcsr, x0
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// Zero out floating point registers
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if cfg!(all(target_arch = "riscv32", riscvd)) {
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// rv32 targets with double precision floating point can use fmvp.d.x
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// to combine 2 32 bit registers to fill the 64 bit floating point
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// register
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riscv_rt_macros::loop_asm!("fmvp.d.x f{}, x0, x0", 32);
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} else if cfg!(riscvd) {
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riscv_rt_macros::loop_asm!("fmv.d.x f{}, x0", 32);
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} else {
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riscv_rt_macros::loop_asm!("fmv.w.x f{}, x0", 32);
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}
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#[cfg(all(target_arch = "riscv32", riscvd))]
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riscv_rt_macros::loop_asm!("fcvt.d.w f{}, x0", 32);
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#[cfg(all(target_arch = "riscv64", riscvd))]
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riscv_rt_macros::loop_asm!("fmv.d.x f{}, x0", 32);
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#[cfg(not(riscvd))]
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riscv_rt_macros::loop_asm!("fmv.w.x f{}, x0", 32);
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}
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_setup_interrupts();

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