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calebzulawskiworkingjubilee
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Attempt to workaround MIPS bug
1 parent 98dad13 commit 589fce0

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2 files changed

+14
-3
lines changed

2 files changed

+14
-3
lines changed

crates/core_simd/src/masks/full_masks.rs

+12-1
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,18 @@ macro_rules! define_mask {
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// TODO remove the transmute when rustc is more flexible
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assert_eq!(core::mem::size_of::<U::IntBitMask>(), core::mem::size_of::<U::BitMask>());
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let mask: U::IntBitMask = crate::intrinsics::simd_bitmask(self.0);
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core::mem::transmute_copy(&mask)
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let mut bitmask: U::BitMask = core::mem::transmute_copy(&mask);
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// There is a bug where LLVM appears to implement this operation with the wrong
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// bit order.
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// TODO fix this in a better way
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if cfg!(any(target_arch = "mips", target_arch = "mips64")) {
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for x in bitmask.as_mut() {
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*x = x.reverse_bits();
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}
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}
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bitmask
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}
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}
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}

crates/core_simd/tests/masks.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -70,10 +70,10 @@ macro_rules! test_mask_api {
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fn to_bitmask() {
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let values = [
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true, false, false, true, false, false, true, false,
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false, false, false, false, false, false, false, false,
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true, true, false, false, false, false, false, true,
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];
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let mask = core_simd::$name::<16>::from_array(values);
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assert_eq!(mask.to_bitmask(), [0b01001001, 0]);
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assert_eq!(mask.to_bitmask(), [0b01001001, 0b10000011]);
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}
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}
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}

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