Support RISC-V unaligned-scalar-mem target feature

This adds `unaligned-scalar-mem` as an allowed RISC-V target feature.
Some RISC-V cores support unaligned access to memory without trapping.
On such cores, the compiler could significantly improve code-size and
performance when using functions like core::ptr::read_unaligned<u32>
by emitting a single load or store instruction with an unaligned
address, rather than a long sequence of byte load/store/bitmanip
instructions.

Enabling the `unaligned-scalar-mem` target feature allows LLVM to do
this optimization.

Fixes #110883

Author: korran

compiler/rustc_codegen_ssa/src/target_features.rs

@@ -252,6 +252,7 @@ const RISCV_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[
     ("f", Some(sym::riscv_target_feature)),
     ("m", Some(sym::riscv_target_feature)),
     ("relax", Some(sym::riscv_target_feature)),
+    ("unaligned-scalar-mem", Some(sym::riscv_target_feature)),
     ("v", Some(sym::riscv_target_feature)),
     ("zba", Some(sym::riscv_target_feature)),
     ("zbb", Some(sym::riscv_target_feature)),