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Add UI test to verify invalid loads are not generated
1 parent fe658e1 commit 346afc7

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‎tests/ui/abi/riscv32e-registers.riscv32e.stderr

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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:43:11
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|
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LL | asm!("li x16, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x16, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:46:11
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|
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LL | asm!("li x17, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x17, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:49:11
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|
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LL | asm!("li x18, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x18, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:52:11
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|
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LL | asm!("li x19, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x19, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:55:11
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|
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LL | asm!("li x20, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x20, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:58:11
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|
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LL | asm!("li x21, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x21, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:61:11
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|
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LL | asm!("li x22, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x22, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:64:11
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|
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LL | asm!("li x23, 0");
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| ^
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x23, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:67:11
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LL | asm!("li x24, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x24, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:70:11
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|
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LL | asm!("li x25, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x25, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:73:11
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|
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LL | asm!("li x26, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x26, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:76:11
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|
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LL | asm!("li x27, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x27, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:79:11
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|
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LL | asm!("li x28, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x28, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:82:11
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|
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LL | asm!("li x29, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x29, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:85:11
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|
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LL | asm!("li x30, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x30, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:88:11
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|
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LL | asm!("li x31, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x31, 0
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| ^
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error: aborting due to 16 previous errors
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‎tests/ui/abi/riscv32e-registers.riscv32em.stderr

+194
Original file line numberDiff line numberDiff line change
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1+
error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:43:11
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|
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LL | asm!("li x16, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x16, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:46:11
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|
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LL | asm!("li x17, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x17, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:49:11
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|
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LL | asm!("li x18, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x18, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:52:11
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|
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LL | asm!("li x19, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x19, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:55:11
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|
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LL | asm!("li x20, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x20, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:58:11
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|
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LL | asm!("li x21, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x21, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:61:11
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|
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LL | asm!("li x22, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x22, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:64:11
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|
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LL | asm!("li x23, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x23, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:67:11
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|
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LL | asm!("li x24, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x24, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:70:11
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|
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LL | asm!("li x25, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x25, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:73:11
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|
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LL | asm!("li x26, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x26, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:76:11
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|
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LL | asm!("li x27, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x27, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:79:11
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|
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LL | asm!("li x28, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x28, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:82:11
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|
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LL | asm!("li x29, 0");
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| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x29, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:85:11
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|
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LL | asm!("li x30, 0");
173+
| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x30, 0
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| ^
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error: invalid operand for instruction
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--> $DIR/riscv32e-registers.rs:88:11
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|
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LL | asm!("li x31, 0");
185+
| ^
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|
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note: instantiated into assembly here
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--> <inline asm>:1:5
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|
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LL | li x31, 0
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| ^
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error: aborting due to 16 previous errors
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