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std_detect: Use riscv_hwprobe on RISC-V Linux/Android
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‎crates/std_detect/README.md

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@@ -56,11 +56,14 @@ crate from working on applications in which `std` is not available.
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[`cupid`](https://crates.io/crates/cupid) crate.
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* Linux/Android:
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* `arm{32, 64}`, `mips{32,64}{,el}`, `powerpc{32,64}{,le}`, `riscv{32,64}`, `loongarch64`, `s390x`:
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* `arm{32, 64}`, `mips{32,64}{,el}`, `powerpc{32,64}{,le}`, `loongarch64`, `s390x`:
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`std_detect` supports these on Linux by querying ELF auxiliary vectors (using `getauxval`
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when available), and if that fails, by querying `/proc/cpuinfo`.
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* `arm64`: partial support for doing run-time feature detection by directly
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querying `mrs` is implemented for Linux >= 4.11, but not enabled by default.
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* `riscv{32,64}`:
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`std_detect` supports these on Linux by querying `riscv_hwprobe`, and
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by querying ELF auxiliary vectors (using `getauxval` when available).
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* FreeBSD:
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* `arm32`, `powerpc64`: `std_detect` supports these on FreeBSD by querying ELF

‎crates/std_detect/src/detect/arch/riscv.rs

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@@ -125,6 +125,10 @@ features! {
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@FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] a: "a";
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/// "A" Extension for Atomic Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zacas: "zacas";
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/// Atomic Compare-And-Swap Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zawrs: "zawrs";
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/// Wait on Reservation Set
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zam: "zam";
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without cfg check: true;
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/// "Zam" Extension for Misaligned Atomics
@@ -194,6 +198,85 @@ features! {
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] v: "v";
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/// "V" Extension for Vector Operations
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvfh: "zvfh";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector Extension for Half-Precision Floating-Point
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvfhmin: "zvfhmin";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector Extension for Minimal Half-Precision Floating-Point
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zve32x: "zve32x";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector Extensions for Embedded Processors
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zve32f: "zve32f";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector Extensions for Embedded Processors
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zve64x: "zve64x";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector Extensions for Embedded Processors
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zve64f: "zve64f";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector Extensions for Embedded Processors
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zve64d: "zve64d";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector Extensions for Embedded Processors
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// FIXME: we can implement this by getting the current vlen
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// zvl*b: Minimum Vector Length Standard Extensions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkb: "zvkb";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector Bit-manipulation used in Cryptography
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvbb: "zvbb";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector basic bit-manipulation instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvbc: "zvbc";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector Carryless Multiplication
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkg: "zvkg";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector GCM instructions for Cryptography
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkned: "zvkned";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector AES Encryption & Decryption (Single Round)
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvknha: "zvknha";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector SHA-2 (SHA-256 only))
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvknhb: "zvknhb";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector SHA-2 (SHA-256 and SHA-512)
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvksed: "zvksed";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// SM4 Block Cipher Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvksh: "zvksh";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// SM3 Hash Function Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkn: "zvkn";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Shorthand for 'Zvkned', 'Zvknhb', 'Zvkb', and 'Zvkt'
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvknc: "zvknc";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Shorthand for 'Zvkn' and 'Zvbc'
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkng: "zvkng";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Shorthand for 'Zvkn' and 'Zvkg'
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvks: "zvks";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Shorthand for 'Zvksed', 'Zvksh', 'Zvkb', and 'Zvkt'
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvksc: "zvksc";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Shorthand for 'Zvks' and 'Zvbc'
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvksg: "zvksg";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Shorthand for 'Zvks' and 'Zvkg'
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zvkt: "zvkt";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Vector Data-Independent Execution Latency
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] unaligned_scalar_mem: "unaligned-scalar-mem";
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/// Has reasonably performant unaligned scalar
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] unaligned_vector_mem: "unaligned-vector-mem";
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without cfg check: true; // FIXME: added in https://github.com/rust-lang/rust/pull/138742
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/// Has reasonably performant unaligned vector
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] svnapot: "svnapot";
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without cfg check: true;

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