From 4864d1cfd8d2d6241a37b493bfe2d42a7ad4749b Mon Sep 17 00:00:00 2001 From: Tsukasa OI Date: Sun, 6 Apr 2025 07:57:22 +0000 Subject: [PATCH] RISC-V: check cfg (batch 1) rust-lang/rust#138823 added five new extensions as compiler target features. This commit reflects that fact and now checks static target features on `std::arch::is_riscv_feature_detected!` as well. * "Zicsr" * "Zicntr" * "Zihpm" * "Zifencei" * "Zihintpause" --- crates/std_detect/src/detect/arch/riscv.rs | 5 ----- 1 file changed, 5 deletions(-) diff --git a/crates/std_detect/src/detect/arch/riscv.rs b/crates/std_detect/src/detect/arch/riscv.rs index 2368131fea..b8fd007dff 100644 --- a/crates/std_detect/src/detect/arch/riscv.rs +++ b/crates/std_detect/src/detect/arch/riscv.rs @@ -104,20 +104,15 @@ features! { /// RV128I Base Integer Instruction Set @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicsr: "zicsr"; - without cfg check: true; /// "Zicsr" Extension for Control and Status Register (CSR) Instructions @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicntr: "zicntr"; - without cfg check: true; /// "Zicntr" Extension for Base Counters and Timers @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihpm: "zihpm"; - without cfg check: true; /// "Zihpm" Extension for Hardware Performance Counters @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zifencei: "zifencei"; - without cfg check: true; /// "Zifencei" Extension for Instruction-Fetch Fence @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihintpause: "zihintpause"; - without cfg check: true; /// "Zihintpause" Extension for Pause Hint @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] m: "m";