diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml index 8a6523e92c..b1a3fdf40a 100644 --- a/.github/workflows/main.yml +++ b/.github/workflows/main.yml @@ -35,20 +35,6 @@ jobs: run: rustup update nightly --no-self-update && rustup default nightly - run: cargo test --manifest-path crates/stdarch-verify/Cargo.toml - env_override: - name: Env Override - needs: [style] - runs-on: ${{ matrix.os }} - strategy: - matrix: - os: [ubuntu-latest, windows-latest] - steps: - - uses: actions/checkout@v4 - - name: Install Rust - run: rustup update nightly --no-self-update && rustup default nightly - - run: RUST_STD_DETECT_UNSTABLE=avx cargo test --features=std_detect_env_override --manifest-path crates/std_detect/Cargo.toml env_override_no_avx - shell: bash - test: needs: [style] name: Test @@ -64,8 +50,6 @@ jobs: os: ubuntu-latest - tuple: x86_64-unknown-linux-gnu os: ubuntu-latest - - tuple: x86_64-unknown-linux-gnu-emulated - os: ubuntu-latest - tuple: arm-unknown-linux-gnueabihf os: ubuntu-latest - tuple: armv7-unknown-linux-gnueabihf @@ -76,6 +60,8 @@ jobs: os: ubuntu-latest - tuple: powerpc-unknown-linux-gnu os: ubuntu-latest + - tuple: powerpc64-unknown-linux-gnu + os: ubuntu-latest - tuple: powerpc64le-unknown-linux-gnu os: ubuntu-latest # MIPS targets disabled since they are dropped to tier 3. @@ -109,36 +95,71 @@ jobs: # macOS targets - tuple: x86_64-apple-darwin - os: macos-13 + os: macos-15-large - tuple: x86_64-apple-ios-macabi - os: macos-13 + os: macos-15-large - tuple: aarch64-apple-darwin - os: macos-latest + os: macos-15 - tuple: aarch64-apple-ios-macabi - os: macos-latest + os: macos-15 # FIXME: gh-actions build environment doesn't have linker support # - tuple: i686-apple-darwin # os: macos-13 # Windows targets - tuple: x86_64-pc-windows-msvc - os: windows-latest + os: windows-2025 - tuple: i686-pc-windows-msvc - os: windows-latest + os: windows-2025 - tuple: aarch64-pc-windows-msvc - os: windows-latest + os: windows-2025 - tuple: x86_64-pc-windows-gnu - os: windows-latest + os: windows-2025 # - tuple: i686-pc-windows-gnu # os: windows-latest # Add additional variables to the matrix variations generated above using `include`: include: + # `TEST_EVERYTHING` setups - there should be at least 1 for each architecture - target: - tuple: x86_64-unknown-linux-gnu-emulated + tuple: aarch64-unknown-linux-gnu + os: ubuntu-latest + test_everything: true + - target: + tuple: armv7-unknown-linux-gnueabihf + os: ubuntu-latest + test_everything: true + - target: + tuple: loongarch64-unknown-linux-gnu + os: ubuntu-latest + test_everything: true + - target: + tuple: powerpc-unknown-linux-gnu + os: ubuntu-latest + disable_assert_instr: true + test_everything: true + - target: + tuple: powerpc64-unknown-linux-gnu + os: ubuntu-latest + disable_assert_instr: true + test_everything: true + - target: + tuple: powerpc64le-unknown-linux-gnu + os: ubuntu-latest + disable_assert_instr: true + test_everything: true + - target: + tuple: riscv64gc-unknown-linux-gnu + os: ubuntu-latest + test_everything: true + - target: + tuple: s390x-unknown-linux-gnu + os: ubuntu-latest + test_everything: true + - target: + tuple: x86_64-unknown-linux-gnu os: ubuntu-latest test_everything: true - rustflags: --cfg stdarch_intel_sde # MIPS targets disabled since they are dropped to tier 3. # See https://github.com/rust-lang/compiler-team/issues/648 #- target: @@ -157,25 +178,17 @@ jobs: # tuple: mipsel-unknown-linux-musl # os: ubuntu-latest # norun: true - - target: - tuple: powerpc-unknown-linux-gnu - os: ubuntu-latest - disable_assert_instr: true - - target: - tuple: powerpc64le-unknown-linux-gnu - os: ubuntu-latest - disable_assert_instr: true - target: tuple: aarch64-apple-darwin - os: macos-latest + os: macos-15 norun: true # https://github.com/rust-lang/stdarch/issues/1206 - target: tuple: aarch64-apple-ios-macabi - os: macos-latest + os: macos-15 norun: true # https://github.com/rust-lang/stdarch/issues/1206 - target: tuple: aarch64-pc-windows-msvc - os: windows-latest + os: windows-2025 norun: true steps: @@ -187,7 +200,6 @@ jobs: rustup update nightly --no-self-update rustup default nightly - run: rustup target add ${{ matrix.target.tuple }} - if: "!endsWith(matrix.target.tuple, 'emulated')" - run: cargo generate-lockfile # Configure some env vars based on matrix configuration @@ -199,9 +211,6 @@ jobs: - run: echo "STDARCH_TEST_EVERYTHING=1" >> $GITHUB_ENV shell: bash if: matrix.test_everything != '' - - run: echo "RUSTFLAGS=${{ matrix.rustflags }}" >> $GITHUB_ENV - shell: bash - if: matrix.rustflags != '' - run: echo "STDARCH_DISABLE_ASSERT_INSTR=1" >> $GITHUB_ENV shell: bash if: matrix.disable_assert_instr != '' @@ -237,7 +246,6 @@ jobs: needs: - docs - verify - - env_override - test - build-std-detect runs-on: ubuntu-latest diff --git a/ci/docker/aarch64-unknown-linux-gnu/Dockerfile b/ci/docker/aarch64-unknown-linux-gnu/Dockerfile index a608d3954c..17025efffe 100644 --- a/ci/docker/aarch64-unknown-linux-gnu/Dockerfile +++ b/ci/docker/aarch64-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc \ g++ \ @@ -14,5 +14,6 @@ RUN apt-get update && apt-get install -y --no-install-recommends \ lld ENV CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_LINKER=aarch64-linux-gnu-gcc \ - CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64 -L /usr/aarch64-linux-gnu" \ - OBJDUMP=aarch64-linux-gnu-objdump + CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64 -cpu max -L /usr/aarch64-linux-gnu" \ + OBJDUMP=aarch64-linux-gnu-objdump \ + STDARCH_TEST_SKIP_FEATURE=tme diff --git a/ci/docker/aarch64_be-unknown-linux-gnu/Dockerfile b/ci/docker/aarch64_be-unknown-linux-gnu/Dockerfile index 5562638646..d7be70843d 100644 --- a/ci/docker/aarch64_be-unknown-linux-gnu/Dockerfile +++ b/ci/docker/aarch64_be-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc \ @@ -25,5 +25,6 @@ ENV AARCH64_BE_TOOLCHAIN="/toolchains/${TOOLCHAIN}" ENV AARCH64_BE_LIBC="${AARCH64_BE_TOOLCHAIN}/aarch64_be-none-linux-gnu/libc" ENV CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_LINKER="${AARCH64_BE_TOOLCHAIN}/bin/aarch64_be-none-linux-gnu-gcc" -ENV CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64_be -L ${AARCH64_BE_LIBC}" +ENV CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64_be -cpu max -L ${AARCH64_BE_LIBC}" ENV OBJDUMP="${AARCH64_BE_TOOLCHAIN}/bin/bin/aarch64-none-linux-gnu-objdump" +ENV STDARCH_TEST_SKIP_FEATURE=tme diff --git a/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile b/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile index 2e5a18b546..14eaf9f9ee 100644 --- a/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile +++ b/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc \ ca-certificates \ @@ -9,5 +9,5 @@ RUN apt-get update && apt-get install -y --no-install-recommends \ make \ file ENV CARGO_TARGET_ARM_UNKNOWN_LINUX_GNUEABIHF_LINKER=arm-linux-gnueabihf-gcc \ - CARGO_TARGET_ARM_UNKNOWN_LINUX_GNUEABIHF_RUNNER="qemu-arm -L /usr/arm-linux-gnueabihf" \ + CARGO_TARGET_ARM_UNKNOWN_LINUX_GNUEABIHF_RUNNER="qemu-arm -cpu max -L /usr/arm-linux-gnueabihf" \ OBJDUMP=arm-linux-gnueabihf-objdump diff --git a/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile b/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile index 401164c19b..2086e117d9 100644 --- a/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile +++ b/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile @@ -13,5 +13,5 @@ RUN apt-get update && apt-get install -y --no-install-recommends \ clang-19 \ lld ENV CARGO_TARGET_ARMV7_UNKNOWN_LINUX_GNUEABIHF_LINKER=arm-linux-gnueabihf-gcc \ - CARGO_TARGET_ARMV7_UNKNOWN_LINUX_GNUEABIHF_RUNNER="qemu-arm -L /usr/arm-linux-gnueabihf" \ + CARGO_TARGET_ARMV7_UNKNOWN_LINUX_GNUEABIHF_RUNNER="qemu-arm -cpu max -L /usr/arm-linux-gnueabihf" \ OBJDUMP=arm-linux-gnueabihf-objdump diff --git a/ci/docker/i586-unknown-linux-gnu/Dockerfile b/ci/docker/i586-unknown-linux-gnu/Dockerfile index a865305707..5a4a22369a 100644 --- a/ci/docker/i586-unknown-linux-gnu/Dockerfile +++ b/ci/docker/i586-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc-multilib \ libc6-dev \ diff --git a/ci/docker/i686-unknown-linux-gnu/Dockerfile b/ci/docker/i686-unknown-linux-gnu/Dockerfile index a865305707..5a4a22369a 100644 --- a/ci/docker/i686-unknown-linux-gnu/Dockerfile +++ b/ci/docker/i686-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc-multilib \ libc6-dev \ diff --git a/ci/docker/loongarch64-unknown-linux-gnu/Dockerfile b/ci/docker/loongarch64-unknown-linux-gnu/Dockerfile index d15ffcb7e8..99ccf286f3 100644 --- a/ci/docker/loongarch64-unknown-linux-gnu/Dockerfile +++ b/ci/docker/loongarch64-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && \ apt-get install -y --no-install-recommends \ @@ -7,5 +7,6 @@ RUN apt-get update && \ ENV CARGO_TARGET_LOONGARCH64_UNKNOWN_LINUX_GNU_LINKER=loongarch64-linux-gnu-gcc-14 \ - CARGO_TARGET_LOONGARCH64_UNKNOWN_LINUX_GNU_RUNNER="qemu-loongarch64-static -L /usr/loongarch64-linux-gnu" \ - OBJDUMP=loongarch64-linux-gnu-objdump + CARGO_TARGET_LOONGARCH64_UNKNOWN_LINUX_GNU_RUNNER="qemu-loongarch64-static -cpu max -L /usr/loongarch64-linux-gnu" \ + OBJDUMP=loongarch64-linux-gnu-objdump \ + STDARCH_TEST_SKIP_FEATURE=frecipe diff --git a/ci/docker/mips-unknown-linux-gnu/Dockerfile b/ci/docker/mips-unknown-linux-gnu/Dockerfile index db0bc86348..f43a3c9663 100644 --- a/ci/docker/mips-unknown-linux-gnu/Dockerfile +++ b/ci/docker/mips-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc libc6-dev qemu-user ca-certificates \ diff --git a/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile b/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile index 4fa2671ba5..235ac0997b 100644 --- a/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile +++ b/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc libc6-dev qemu-user ca-certificates \ diff --git a/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile b/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile index f35d7ed2b6..6041d89117 100644 --- a/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile +++ b/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc libc6-dev qemu-user ca-certificates \ diff --git a/ci/docker/mipsel-unknown-linux-musl/Dockerfile b/ci/docker/mipsel-unknown-linux-musl/Dockerfile index e5540f28f8..cd38348eeb 100644 --- a/ci/docker/mipsel-unknown-linux-musl/Dockerfile +++ b/ci/docker/mipsel-unknown-linux-musl/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && \ apt-get install -y --no-install-recommends \ diff --git a/ci/docker/nvptx64-nvidia-cuda/Dockerfile b/ci/docker/nvptx64-nvidia-cuda/Dockerfile index 574fca6903..5b4869863c 100644 --- a/ci/docker/nvptx64-nvidia-cuda/Dockerfile +++ b/ci/docker/nvptx64-nvidia-cuda/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc \ libc6-dev \ diff --git a/ci/docker/powerpc-unknown-linux-gnu/Dockerfile b/ci/docker/powerpc-unknown-linux-gnu/Dockerfile index 05eb093893..baad95d578 100644 --- a/ci/docker/powerpc-unknown-linux-gnu/Dockerfile +++ b/ci/docker/powerpc-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc libc6-dev qemu-user ca-certificates \ @@ -6,6 +6,7 @@ RUN apt-get update && apt-get install -y --no-install-recommends \ qemu-system-ppc make file ENV CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_LINKER=powerpc-linux-gnu-gcc \ - CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc -cpu Vger -L /usr/powerpc-linux-gnu" \ + CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc -cpu mpc8610 -L /usr/powerpc-linux-gnu" \ CC=powerpc-linux-gnu-gcc \ - OBJDUMP=powerpc-linux-gnu-objdump + OBJDUMP=powerpc-linux-gnu-objdump \ + STDARCH_TEST_SKIP_FEATURE=vsx diff --git a/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile b/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile index 4764706558..dcbcb43513 100644 --- a/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile +++ b/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc libc6-dev qemu-user ca-certificates \ @@ -6,6 +6,9 @@ RUN apt-get update && apt-get install -y --no-install-recommends \ file make ENV CARGO_TARGET_POWERPC64_UNKNOWN_LINUX_GNU_LINKER=powerpc64-linux-gnu-gcc \ - CARGO_TARGET_POWERPC64_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64 -cpu power10 -L /usr/powerpc64-linux-gnu" \ + CARGO_TARGET_POWERPC64_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64 -cpu power11 -L /usr/powerpc64-linux-gnu" \ CC=powerpc64-linux-gnu-gcc \ - OBJDUMP=powerpc64-linux-gnu-objdump + OBJDUMP=powerpc64-linux-gnu-objdump \ + STDARCH_TEST_SKIP_FEATURE=vsx \ +# These 2 tests have erratic behaviour with qemu, see https://gitlab.com/qemu-project/qemu/-/issues/1623#note_2449012173 + STDARCH_TEST_SKIP_FUNCTION=vec_lde_u16,vec_lde_u32 diff --git a/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile b/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile index 7c14663766..8dfac0ec1e 100644 --- a/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile +++ b/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc libc6-dev qemu-user ca-certificates \ @@ -7,6 +7,6 @@ RUN apt-get update && apt-get install -y --no-install-recommends \ # Work around qemu triggering a sigill on vec_subs if the cpu target is not defined. ENV CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_LINKER=powerpc64le-linux-gnu-gcc \ - CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64le -cpu power10 -L /usr/powerpc64le-linux-gnu" \ + CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64le -cpu power11 -L /usr/powerpc64le-linux-gnu" \ CC=powerpc64le-linux-gnu-gcc \ OBJDUMP=powerpc64le-linux-gnu-objdump diff --git a/ci/docker/riscv64gc-unknown-linux-gnu/Dockerfile b/ci/docker/riscv64gc-unknown-linux-gnu/Dockerfile index eb22bd11a5..7ee69e46e2 100644 --- a/ci/docker/riscv64gc-unknown-linux-gnu/Dockerfile +++ b/ci/docker/riscv64gc-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc libc6-dev qemu-user ca-certificates \ @@ -6,8 +6,5 @@ RUN apt-get update && apt-get install -y --no-install-recommends \ llvm ENV CARGO_TARGET_RISCV64GC_UNKNOWN_LINUX_GNU_LINKER=riscv64-linux-gnu-gcc \ - CARGO_TARGET_RISCV64GC_UNKNOWN_LINUX_GNU_RUNNER="qemu-riscv64 \ - -L /usr/riscv64-linux-gnu \ - -cpu rv64,zk=true,zks=true,zbb=true,zbc=true \ - " \ + CARGO_TARGET_RISCV64GC_UNKNOWN_LINUX_GNU_RUNNER="qemu-riscv64 -cpu max -L /usr/riscv64-linux-gnu" \ OBJDUMP=llvm-objdump diff --git a/ci/docker/s390x-unknown-linux-gnu/Dockerfile b/ci/docker/s390x-unknown-linux-gnu/Dockerfile index b55b75daeb..af02ebcbd1 100644 --- a/ci/docker/s390x-unknown-linux-gnu/Dockerfile +++ b/ci/docker/s390x-unknown-linux-gnu/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ curl ca-certificates \ @@ -10,5 +10,5 @@ RUN apt-get update && apt-get install -y --no-install-recommends \ file ENV CARGO_TARGET_S390X_UNKNOWN_LINUX_GNU_LINKER=s390x-linux-gnu-gcc \ - CARGO_TARGET_S390X_UNKNOWN_LINUX_GNU_RUNNER="qemu-s390x -L /usr/s390x-linux-gnu" \ + CARGO_TARGET_S390X_UNKNOWN_LINUX_GNU_RUNNER="qemu-s390x -cpu max -L /usr/s390x-linux-gnu" \ OBJDUMP=s390x-linux-gnu-objdump diff --git a/ci/docker/wasm32-wasip1/Dockerfile b/ci/docker/wasm32-wasip1/Dockerfile index 109c41c01d..eeafde7973 100644 --- a/ci/docker/wasm32-wasip1/Dockerfile +++ b/ci/docker/wasm32-wasip1/Dockerfile @@ -1,4 +1,4 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update -y && apt-get install -y --no-install-recommends \ diff --git a/ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile b/ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile deleted file mode 100644 index 838017febb..0000000000 --- a/ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile +++ /dev/null @@ -1,16 +0,0 @@ -FROM ubuntu:24.04 -RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc \ - libc6-dev \ - file \ - make \ - ca-certificates \ - wget \ - xz-utils - -RUN wget http://ci-mirrors.rust-lang.org/stdarch/sde-external-9.53.0-2025-03-16-lin.tar.xz -O sde.tar.xz -RUN mkdir intel-sde -RUN tar -xJf sde.tar.xz --strip-components=1 -C intel-sde -ENV CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="/intel-sde/sde64 \ - -cpuid-in /checkout/ci/docker/x86_64-unknown-linux-gnu-emulated/cpuid.def \ - -rtm-mode full -tsx --" diff --git a/ci/docker/x86_64-unknown-linux-gnu/Dockerfile b/ci/docker/x86_64-unknown-linux-gnu/Dockerfile index 8d478d6d8d..acde432794 100644 --- a/ci/docker/x86_64-unknown-linux-gnu/Dockerfile +++ b/ci/docker/x86_64-unknown-linux-gnu/Dockerfile @@ -1,7 +1,18 @@ -FROM ubuntu:24.04 +FROM ubuntu:25.04 RUN apt-get update && apt-get install -y --no-install-recommends \ gcc \ libc6-dev \ file \ make \ - ca-certificates + ca-certificates \ + wget \ + xz-utils + +RUN wget http://ci-mirrors.rust-lang.org/stdarch/sde-external-9.53.0-2025-03-16-lin.tar.xz -O sde.tar.xz +RUN mkdir intel-sde +RUN tar -xJf sde.tar.xz --strip-components=1 -C intel-sde +ENV CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="/intel-sde/sde64 \ + -cpuid-in /checkout/ci/docker/x86_64-unknown-linux-gnu/cpuid.def \ + -rtm-mode full -tsx --" +# These tests fail with SDE as it doesn't support saving register data +ENV STDARCH_TEST_SKIP_FUNCTION="xsave,xsaveopt,xsave64,xsaveopt64" diff --git a/ci/docker/x86_64-unknown-linux-gnu-emulated/cpuid.def b/ci/docker/x86_64-unknown-linux-gnu/cpuid.def similarity index 100% rename from ci/docker/x86_64-unknown-linux-gnu-emulated/cpuid.def rename to ci/docker/x86_64-unknown-linux-gnu/cpuid.def diff --git a/ci/run-docker.sh b/ci/run-docker.sh index 59170439c5..183daf666c 100755 --- a/ci/run-docker.sh +++ b/ci/run-docker.sh @@ -11,7 +11,6 @@ if [ $# -lt 1 ]; then fi run() { - target=$(echo "${1}" | sed 's/-emulated//') echo "Building docker container for TARGET=${1}" docker build -t stdarch -f "ci/docker/${1}/Dockerfile" ci/ mkdir -p target c_programs rust_programs @@ -22,14 +21,12 @@ run() { --user "$(id -u)":"$(id -g)" \ --env CARGO_HOME=/cargo \ --env CARGO_TARGET_DIR=/checkout/target \ - --env TARGET="${target}" \ + --env TARGET="${1}" \ --env STDARCH_TEST_EVERYTHING \ - --env STDARCH_ASSERT_INSTR_IGNORE \ --env STDARCH_DISABLE_ASSERT_INSTR \ --env NOSTD \ --env NORUN \ --env RUSTFLAGS \ - --env STDARCH_TEST_NORUN \ --volume "${HOME}/.cargo":/cargo \ --volume "$(rustc --print sysroot)":/rust:ro \ --volume "$(pwd)":/checkout:ro \ diff --git a/ci/run.sh b/ci/run.sh index c5dcbcd82b..f582602a8c 100755 --- a/ci/run.sh +++ b/ci/run.sh @@ -14,8 +14,6 @@ export RUSTFLAGS="${RUSTFLAGS} -D warnings -Z merge-functions=disabled " export HOST_RUSTFLAGS="${RUSTFLAGS}" export PROFILE="${PROFILE:="--profile=release"}" -export STDARCH_DISABLE_DEDUP_GUARD=1 - case ${TARGET} in # On Windows the linker performs identical COMDAT folding (ICF) by default # in release mode which removes identical COMDAT sections. This interferes @@ -29,11 +27,8 @@ case ${TARGET} in # instruction assertion checks to pass below the 20 instruction limit. If # this is the default, dynamic, then too many instructions are generated # when we assert the instruction for a function and it causes tests to fail. - # - # It's not clear why `-Z plt=yes` is required here. Probably a bug in LLVM. - # If you can remove it and CI passes, please feel free to do so! i686-* | i586-*) - export RUSTFLAGS="${RUSTFLAGS} -C relocation-model=static -Z plt=yes" + export RUSTFLAGS="${RUSTFLAGS} -C relocation-model=static" ;; # Some x86_64 targets enable by default more features beyond SSE2, # which cause some instruction assertion checks to fail. @@ -44,12 +39,8 @@ case ${TARGET} in mips-* | mipsel-*) export RUSTFLAGS="${RUSTFLAGS} -C llvm-args=-fast-isel=false" ;; - # Some of our test dependencies use the deprecated `gcc` crates which is - # missing a fix from https://github.com/alexcrichton/cc-rs/pull/627. Apply - # the workaround manually here. armv7-*eabihf | thumbv7-*eabihf) export RUSTFLAGS="${RUSTFLAGS} -Ctarget-feature=+neon" - export TARGET_CFLAGS="-mfpu=vfpv3-d16" ;; # Some of our test dependencies use the deprecated `gcc` crates which # doesn't detect RISC-V compilers automatically, so do it manually here. @@ -60,10 +51,11 @@ case ${TARGET} in esac echo "RUSTFLAGS=${RUSTFLAGS}" -echo "FEATURES=${FEATURES}" echo "OBJDUMP=${OBJDUMP}" echo "STDARCH_DISABLE_ASSERT_INSTR=${STDARCH_DISABLE_ASSERT_INSTR}" echo "STDARCH_TEST_EVERYTHING=${STDARCH_TEST_EVERYTHING}" +echo "STDARCH_TEST_SKIP_FEATURE=${STDARCH_TEST_SKIP_FEATURE}" +echo "STDARCH_TEST_SKIP_FUNCTION=${STDARCH_TEST_SKIP_FUNCTION}" echo "PROFILE=${PROFILE}" cargo_test() { @@ -83,10 +75,6 @@ cargo_test() { cmd="$cmd --nocapture" ;; esac - - if [ "$SKIP_TESTS" != "" ]; then - cmd="$cmd --skip "$SKIP_TESTS - fi $cmd } @@ -111,8 +99,18 @@ fi # Test targets compiled with extra features. case ${TARGET} in - x86*) + x86_64-unknown-linux-gnu) export STDARCH_DISABLE_ASSERT_INSTR=1 + + export RUSTFLAGS="${RUSTFLAGS} -C target-feature=+avx" + cargo_test "${PROFILE}" + + export RUSTFLAGS="${RUSTFLAGS} -C target-feature=+avx512f" + cargo_test "${PROFILE}" + ;; + x86_64* | i686*) + export STDARCH_DISABLE_ASSERT_INSTR=1 + export RUSTFLAGS="${RUSTFLAGS} -C target-feature=+avx" cargo_test "${PROFILE}" ;; @@ -130,13 +128,15 @@ case ${TARGET} in cargo_test "${PROFILE}" ;; powerpc64*) - # We don't build the ppc 32-bit targets with these - these targets - # are mostly unsupported for now. - OLD_RUSTFLAGS="${RUSTFLAGS}" - export RUSTFLAGS="${OLD_RUSTFLAGS} -C target-feature=+altivec" + export RUSTFLAGS="${RUSTFLAGS} -C target-feature=+altivec" cargo_test "${PROFILE}" - export RUSTFLAGS="${OLD_RUSTFLAGS} -C target-feature=+vsx" + export RUSTFLAGS="${RUSTFLAGS} -C target-feature=+vsx" + cargo_test "${PROFILE}" + ;; + powerpc*) + # qemu has a bug in PPC32 which leads to a crash when compiled with `vsx` + export RUSTFLAGS="${RUSTFLAGS} -C target-feature=+altivec" cargo_test "${PROFILE}" ;; diff --git a/crates/assert-instr-macro/Cargo.toml b/crates/assert-instr-macro/Cargo.toml index 47410a6679..77ee571ccb 100644 --- a/crates/assert-instr-macro/Cargo.toml +++ b/crates/assert-instr-macro/Cargo.toml @@ -12,3 +12,6 @@ test = false proc-macro2 = "1.0" quote = "1.0" syn = { version = "2.0", features = ["full"] } + +[lints.rust] +unexpected_cfgs = {level = "warn", check-cfg = ['cfg(optimized)'] } diff --git a/crates/assert-instr-macro/build.rs b/crates/assert-instr-macro/build.rs index e02205f3b4..360bc27421 100644 --- a/crates/assert-instr-macro/build.rs +++ b/crates/assert-instr-macro/build.rs @@ -1,8 +1,6 @@ use std::env; fn main() { - println!("cargo:rerun-if-changed=build.rs"); - println!("cargo::rustc-check-cfg=cfg(optimized)"); let opt_level = env::var("OPT_LEVEL") .ok() .and_then(|s| s.parse().ok()) diff --git a/crates/assert-instr-macro/src/lib.rs b/crates/assert-instr-macro/src/lib.rs index acc764e7aa..96b86d93bb 100644 --- a/crates/assert-instr-macro/src/lib.rs +++ b/crates/assert-instr-macro/src/lib.rs @@ -50,10 +50,6 @@ pub fn assert_instr( // testing for. let disable_assert_instr = std::env::var("STDARCH_DISABLE_ASSERT_INSTR").is_ok(); - // Disable dedup guard. Only works if the LLVM MergeFunctions pass is disabled, e.g. - // with `-Z merge-functions=disabled` in RUSTFLAGS. - let disable_dedup_guard = std::env::var("STDARCH_DISABLE_DEDUP_GUARD").is_ok(); - // If instruction tests are disabled avoid emitting this shim at all, just // return the original item without our attribute. if !cfg!(optimized) || disable_assert_instr { @@ -69,10 +65,6 @@ pub fn assert_instr( &format!("stdarch_test_shim_{name}_{instr_str}"), name.span(), ); - let shim_name_ptr = syn::Ident::new( - &format!("stdarch_test_shim_{name}_{instr_str}_ptr").to_ascii_uppercase(), - name.span(), - ); let mut inputs = Vec::new(); let mut input_vals = Vec::new(); let mut const_vals = Vec::new(); @@ -138,41 +130,13 @@ pub fn assert_instr( } else { syn::LitStr::new("C", proc_macro2::Span::call_site()) }; - let shim_name_str = format!("{shim_name}{assert_name}"); - let to_test = if disable_dedup_guard { - quote! { - #attrs - #maybe_allow_deprecated - #[unsafe(no_mangle)] - #[inline(never)] - pub unsafe extern #abi fn #shim_name(#(#inputs),*) #ret { - #name::<#(#const_vals),*>(#(#input_vals),*) - } - } - } else { - quote! { - - const #shim_name_ptr : *const u8 = #shim_name_str.as_ptr(); - - #attrs - #maybe_allow_deprecated - #[unsafe(no_mangle)] - #[inline(never)] - pub unsafe extern #abi fn #shim_name(#(#inputs),*) #ret { - // The compiler in optimized mode by default runs a pass called - // "mergefunc" where it'll merge functions that look identical. - // Turns out some intrinsics produce identical code and they're - // folded together, meaning that one just jumps to another. This - // messes up our inspection of the disassembly of this function and - // we're not a huge fan of that. - // - // To thwart this pass and prevent functions from being merged we - // generate some code that's hopefully very tight in terms of - // codegen but is otherwise unique to prevent code from being - // folded. - ::stdarch_test::_DONT_DEDUP = #shim_name_ptr; - #name::<#(#const_vals),*>(#(#input_vals),*) - } + let to_test = quote! { + #attrs + #maybe_allow_deprecated + #[unsafe(no_mangle)] + #[inline(never)] + pub unsafe extern #abi fn #shim_name(#(#inputs),*) #ret { + #name::<#(#const_vals),*>(#(#input_vals),*) } }; @@ -182,9 +146,7 @@ pub fn assert_instr( fn #assert_name() { #to_test - ::stdarch_test::assert(#shim_name as usize, - stringify!(#shim_name), - #instr); + ::stdarch_test::assert(#shim_name as usize, stringify!(#shim_name), #instr); } }; diff --git a/crates/core_arch/Cargo.toml b/crates/core_arch/Cargo.toml index 296abc9ecf..f4bd5fc552 100644 --- a/crates/core_arch/Cargo.toml +++ b/crates/core_arch/Cargo.toml @@ -27,9 +27,6 @@ std_detect = { version = "0.*", path = "../std_detect" } [target.'cfg(all(target_arch = "x86_64", target_os = "linux"))'.dev-dependencies] syscalls = { version = "0.6.18", default-features = false } -[lints.rust] -unexpected_cfgs = {level = "warn", check-cfg = ['cfg(stdarch_intel_sde)'] } - [lints.clippy] too_long_first_doc_paragraph = "allow" missing_transmute_annotations = "allow" diff --git a/crates/core_arch/src/x86/avx.rs b/crates/core_arch/src/x86/avx.rs index 82d8b53218..f97bab4994 100644 --- a/crates/core_arch/src/x86/avx.rs +++ b/crates/core_arch/src/x86/avx.rs @@ -970,10 +970,7 @@ pub fn _mm256_cvttps_epi32(a: __m256) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extractf128_ps) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf128, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))] #[rustc_legacy_const_generics(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm256_extractf128_ps(a: __m256) -> __m128 { @@ -993,10 +990,7 @@ pub fn _mm256_extractf128_ps(a: __m256) -> __m128 { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extractf128_pd) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf128, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))] #[rustc_legacy_const_generics(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm256_extractf128_pd(a: __m256d) -> __m128d { @@ -1009,10 +1003,7 @@ pub fn _mm256_extractf128_pd(a: __m256d) -> __m128d { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extractf128_si256) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf128, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))] #[rustc_legacy_const_generics(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm256_extractf128_si256(a: __m256i) -> __m128i { @@ -1328,10 +1319,7 @@ pub unsafe fn _mm256_broadcast_pd(a: &__m128d) -> __m256d { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insertf128_ps) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vinsertf128, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))] #[rustc_legacy_const_generics(2)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm256_insertf128_ps(a: __m256, b: __m128) -> __m256 { @@ -1352,10 +1340,7 @@ pub fn _mm256_insertf128_ps(a: __m256, b: __m128) -> __m256 { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insertf128_pd) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vinsertf128, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))] #[rustc_legacy_const_generics(2)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm256_insertf128_pd(a: __m256d, b: __m128d) -> __m256d { @@ -1375,10 +1360,7 @@ pub fn _mm256_insertf128_pd(a: __m256d, b: __m128d) -> __m256d /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insertf128_si256) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vinsertf128, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))] #[rustc_legacy_const_generics(2)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm256_insertf128_si256(a: __m256i, b: __m128i) -> __m256i { diff --git a/crates/core_arch/src/x86/avx2.rs b/crates/core_arch/src/x86/avx2.rs index 20c61449a7..1c488c6d74 100644 --- a/crates/core_arch/src/x86/avx2.rs +++ b/crates/core_arch/src/x86/avx2.rs @@ -957,10 +957,7 @@ pub fn _mm256_cvtepu8_epi64(a: __m128i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extracti128_si256) #[inline] #[target_feature(enable = "avx2")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf128, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))] #[rustc_legacy_const_generics(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm256_extracti128_si256(a: __m256i) -> __m128i { @@ -1781,10 +1778,7 @@ pub unsafe fn _mm256_mask_i64gather_pd( /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_inserti128_si256) #[inline] #[target_feature(enable = "avx2")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vinsertf128, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))] #[rustc_legacy_const_generics(2)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm256_inserti128_si256(a: __m256i, b: __m128i) -> __m256i { diff --git a/crates/core_arch/src/x86/avx512f.rs b/crates/core_arch/src/x86/avx512f.rs index 8671c0094b..a81b64c383 100644 --- a/crates/core_arch/src/x86/avx512f.rs +++ b/crates/core_arch/src/x86/avx512f.rs @@ -24813,10 +24813,7 @@ pub fn _mm256_maskz_shuffle_f64x2(k: __mmask8, a: __m256d, b: _ #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf32x4, IMM8 = 3) -)] +#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 3))] #[rustc_legacy_const_generics(1)] pub fn _mm512_extractf32x4_ps(a: __m512) -> __m128 { unsafe { @@ -24836,10 +24833,7 @@ pub fn _mm512_extractf32x4_ps(a: __m512) -> __m128 { #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf32x4, IMM8 = 3) -)] +#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 3))] #[rustc_legacy_const_generics(3)] pub fn _mm512_mask_extractf32x4_ps(src: __m128, k: __mmask8, a: __m512) -> __m128 { unsafe { @@ -24855,10 +24849,7 @@ pub fn _mm512_mask_extractf32x4_ps(src: __m128, k: __mmask8, a: #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf32x4, IMM8 = 3) -)] +#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 3))] #[rustc_legacy_const_generics(2)] pub fn _mm512_maskz_extractf32x4_ps(k: __mmask8, a: __m512) -> __m128 { unsafe { @@ -24875,7 +24866,7 @@ pub fn _mm512_maskz_extractf32x4_ps(k: __mmask8, a: __m512) -> #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] #[cfg_attr( - all(test, not(target_env = "msvc")), + test, assert_instr(vextract, IMM8 = 1) //should be vextractf32x4 )] #[rustc_legacy_const_generics(1)] @@ -24895,10 +24886,7 @@ pub fn _mm256_extractf32x4_ps(a: __m256) -> __m128 { #[inline] #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf32x4, IMM8 = 1) -)] +#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 1))] #[rustc_legacy_const_generics(3)] pub fn _mm256_mask_extractf32x4_ps(src: __m128, k: __mmask8, a: __m256) -> __m128 { unsafe { @@ -24914,10 +24902,7 @@ pub fn _mm256_mask_extractf32x4_ps(src: __m128, k: __mmask8, a: #[inline] #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf32x4, IMM8 = 1) -)] +#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 1))] #[rustc_legacy_const_generics(2)] pub fn _mm256_maskz_extractf32x4_ps(k: __mmask8, a: __m256) -> __m128 { unsafe { @@ -24934,7 +24919,7 @@ pub fn _mm256_maskz_extractf32x4_ps(k: __mmask8, a: __m256) -> #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] #[cfg_attr( - all(test, not(target_env = "msvc")), + test, assert_instr(vextractf64x4, IMM1 = 1) //should be vextracti64x4 )] #[rustc_legacy_const_generics(1)] @@ -24954,10 +24939,7 @@ pub fn _mm512_extracti64x4_epi64(a: __m512i) -> __m256i { #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextracti64x4, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vextracti64x4, IMM1 = 1))] #[rustc_legacy_const_generics(3)] pub fn _mm512_mask_extracti64x4_epi64( src: __m256i, @@ -24977,10 +24959,7 @@ pub fn _mm512_mask_extracti64x4_epi64( #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextracti64x4, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vextracti64x4, IMM1 = 1))] #[rustc_legacy_const_generics(2)] pub fn _mm512_maskz_extracti64x4_epi64(k: __mmask8, a: __m512i) -> __m256i { unsafe { @@ -24996,10 +24975,7 @@ pub fn _mm512_maskz_extracti64x4_epi64(k: __mmask8, a: __m512i) #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf64x4, IMM8 = 1) -)] +#[cfg_attr(test, assert_instr(vextractf64x4, IMM8 = 1))] #[rustc_legacy_const_generics(1)] pub fn _mm512_extractf64x4_pd(a: __m512d) -> __m256d { unsafe { @@ -25017,10 +24993,7 @@ pub fn _mm512_extractf64x4_pd(a: __m512d) -> __m256d { #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf64x4, IMM8 = 1) -)] +#[cfg_attr(test, assert_instr(vextractf64x4, IMM8 = 1))] #[rustc_legacy_const_generics(3)] pub fn _mm512_mask_extractf64x4_pd( src: __m256d, @@ -25040,10 +25013,7 @@ pub fn _mm512_mask_extractf64x4_pd( #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextractf64x4, IMM8 = 1) -)] +#[cfg_attr(test, assert_instr(vextractf64x4, IMM8 = 1))] #[rustc_legacy_const_generics(2)] pub fn _mm512_maskz_extractf64x4_pd(k: __mmask8, a: __m512d) -> __m256d { unsafe { @@ -25060,7 +25030,7 @@ pub fn _mm512_maskz_extractf64x4_pd(k: __mmask8, a: __m512d) -> #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] #[cfg_attr( - all(test, not(target_env = "msvc")), + test, assert_instr(vextractf32x4, IMM2 = 3) //should be vextracti32x4 )] #[rustc_legacy_const_generics(1)] @@ -25085,10 +25055,7 @@ pub fn _mm512_extracti32x4_epi32(a: __m512i) -> __m128i { #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextracti32x4, IMM2 = 3) -)] +#[cfg_attr(test, assert_instr(vextracti32x4, IMM2 = 3))] #[rustc_legacy_const_generics(3)] pub fn _mm512_mask_extracti32x4_epi32( src: __m128i, @@ -25108,10 +25075,7 @@ pub fn _mm512_mask_extracti32x4_epi32( #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextracti32x4, IMM2 = 3) -)] +#[cfg_attr(test, assert_instr(vextracti32x4, IMM2 = 3))] #[rustc_legacy_const_generics(2)] pub fn _mm512_maskz_extracti32x4_epi32(k: __mmask8, a: __m512i) -> __m128i { unsafe { @@ -25128,7 +25092,7 @@ pub fn _mm512_maskz_extracti32x4_epi32(k: __mmask8, a: __m512i) #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] #[cfg_attr( - all(test, not(target_env = "msvc")), + test, assert_instr(vextract, IMM1 = 1) //should be vextracti32x4 )] #[rustc_legacy_const_generics(1)] @@ -25151,10 +25115,7 @@ pub fn _mm256_extracti32x4_epi32(a: __m256i) -> __m128i { #[inline] #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextracti32x4, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vextracti32x4, IMM1 = 1))] #[rustc_legacy_const_generics(3)] pub fn _mm256_mask_extracti32x4_epi32( src: __m128i, @@ -25174,10 +25135,7 @@ pub fn _mm256_mask_extracti32x4_epi32( #[inline] #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vextracti32x4, IMM1 = 1) -)] +#[cfg_attr(test, assert_instr(vextracti32x4, IMM1 = 1))] #[rustc_legacy_const_generics(2)] pub fn _mm256_maskz_extracti32x4_epi32(k: __mmask8, a: __m256i) -> __m128i { unsafe { @@ -25572,7 +25530,7 @@ pub fn _mm512_maskz_inserti32x4(k: __mmask16, a: __m512i, b: __ #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] #[cfg_attr( - all(test, not(target_env = "msvc")), + test, assert_instr(vinsert, IMM8 = 1) //should be vinserti32x4 )] #[rustc_legacy_const_generics(2)] @@ -25595,10 +25553,7 @@ pub fn _mm256_inserti32x4(a: __m256i, b: __m128i) -> __m256i { #[inline] #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vinserti32x4, IMM8 = 1) -)] +#[cfg_attr(test, assert_instr(vinserti32x4, IMM8 = 1))] #[rustc_legacy_const_generics(4)] pub fn _mm256_mask_inserti32x4( src: __m256i, @@ -25619,10 +25574,7 @@ pub fn _mm256_mask_inserti32x4( #[inline] #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vinserti32x4, IMM8 = 1) -)] +#[cfg_attr(test, assert_instr(vinserti32x4, IMM8 = 1))] #[rustc_legacy_const_generics(3)] pub fn _mm256_maskz_inserti32x4(k: __mmask8, a: __m256i, b: __m128i) -> __m256i { unsafe { @@ -25773,7 +25725,7 @@ pub fn _mm512_maskz_insertf32x4(k: __mmask16, a: __m512, b: __m #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] #[cfg_attr( - all(test, not(target_env = "msvc")), + test, assert_instr(vinsert, IMM8 = 1) //should be vinsertf32x4 )] #[rustc_legacy_const_generics(2)] @@ -25794,10 +25746,7 @@ pub fn _mm256_insertf32x4(a: __m256, b: __m128) -> __m256 { #[inline] #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vinsertf32x4, IMM8 = 1) -)] +#[cfg_attr(test, assert_instr(vinsertf32x4, IMM8 = 1))] #[rustc_legacy_const_generics(4)] pub fn _mm256_mask_insertf32x4( src: __m256, @@ -25818,10 +25767,7 @@ pub fn _mm256_mask_insertf32x4( #[inline] #[target_feature(enable = "avx512f,avx512vl")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(vinsertf32x4, IMM8 = 1) -)] +#[cfg_attr(test, assert_instr(vinsertf32x4, IMM8 = 1))] #[rustc_legacy_const_generics(3)] pub fn _mm256_maskz_insertf32x4(k: __mmask8, a: __m256, b: __m128) -> __m256 { unsafe { @@ -26958,7 +26904,7 @@ pub fn _mm512_castsi512_pd(a: __m512i) -> __m512d { #[inline] #[target_feature(enable = "avx512f")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(vmovd))] +#[cfg_attr(test, assert_instr(vmovd))] pub fn _mm512_cvtsi512_si32(a: __m512i) -> i32 { unsafe { simd_extract!(a.as_i32x16(), 0) } } diff --git a/crates/core_arch/src/x86/avx512ifma.rs b/crates/core_arch/src/x86/avx512ifma.rs index e4e715ae7b..541745a402 100644 --- a/crates/core_arch/src/x86/avx512ifma.rs +++ b/crates/core_arch/src/x86/avx512ifma.rs @@ -108,10 +108,7 @@ pub fn _mm512_maskz_madd52lo_epu64(k: __mmask8, a: __m512i, b: __m512i, c: __m51 #[inline] #[target_feature(enable = "avxifma")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpmadd52huq) -)] +#[cfg_attr(test, assert_instr(vpmadd52huq))] pub fn _mm256_madd52hi_avx_epu64(a: __m256i, b: __m256i, c: __m256i) -> __m256i { unsafe { vpmadd52huq_256(a, b, c) } } @@ -173,10 +170,7 @@ pub fn _mm256_maskz_madd52hi_epu64(k: __mmask8, a: __m256i, b: __m256i, c: __m25 #[inline] #[target_feature(enable = "avxifma")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpmadd52luq) -)] +#[cfg_attr(test, assert_instr(vpmadd52luq))] pub fn _mm256_madd52lo_avx_epu64(a: __m256i, b: __m256i, c: __m256i) -> __m256i { unsafe { vpmadd52luq_256(a, b, c) } } @@ -238,10 +232,7 @@ pub fn _mm256_maskz_madd52lo_epu64(k: __mmask8, a: __m256i, b: __m256i, c: __m25 #[inline] #[target_feature(enable = "avxifma")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpmadd52huq) -)] +#[cfg_attr(test, assert_instr(vpmadd52huq))] pub fn _mm_madd52hi_avx_epu64(a: __m128i, b: __m128i, c: __m128i) -> __m128i { unsafe { vpmadd52huq_128(a, b, c) } } @@ -303,10 +294,7 @@ pub fn _mm_maskz_madd52hi_epu64(k: __mmask8, a: __m128i, b: __m128i, c: __m128i) #[inline] #[target_feature(enable = "avxifma")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpmadd52luq) -)] +#[cfg_attr(test, assert_instr(vpmadd52luq))] pub fn _mm_madd52lo_avx_epu64(a: __m128i, b: __m128i, c: __m128i) -> __m128i { unsafe { vpmadd52luq_128(a, b, c) } } diff --git a/crates/core_arch/src/x86/avx512vnni.rs b/crates/core_arch/src/x86/avx512vnni.rs index d7cd0838c2..e087d23171 100644 --- a/crates/core_arch/src/x86/avx512vnni.rs +++ b/crates/core_arch/src/x86/avx512vnni.rs @@ -49,10 +49,7 @@ pub fn _mm512_maskz_dpwssd_epi32(k: __mmask16, src: __m512i, a: __m512i, b: __m5 #[inline] #[target_feature(enable = "avxvnni")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwssd) -)] +#[cfg_attr(test, assert_instr(vpdpwssd))] pub fn _mm256_dpwssd_avx_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpwssd256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } } @@ -102,10 +99,7 @@ pub fn _mm256_maskz_dpwssd_epi32(k: __mmask8, src: __m256i, a: __m256i, b: __m25 #[inline] #[target_feature(enable = "avxvnni")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwssd) -)] +#[cfg_attr(test, assert_instr(vpdpwssd))] pub fn _mm_dpwssd_avx_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpwssd128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } } @@ -194,10 +188,7 @@ pub fn _mm512_maskz_dpwssds_epi32(k: __mmask16, src: __m512i, a: __m512i, b: __m #[inline] #[target_feature(enable = "avxvnni")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwssds) -)] +#[cfg_attr(test, assert_instr(vpdpwssds))] pub fn _mm256_dpwssds_avx_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpwssds256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } } @@ -247,10 +238,7 @@ pub fn _mm256_maskz_dpwssds_epi32(k: __mmask8, src: __m256i, a: __m256i, b: __m2 #[inline] #[target_feature(enable = "avxvnni")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwssds) -)] +#[cfg_attr(test, assert_instr(vpdpwssds))] pub fn _mm_dpwssds_avx_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpwssds128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } } @@ -339,10 +327,7 @@ pub fn _mm512_maskz_dpbusd_epi32(k: __mmask16, src: __m512i, a: __m512i, b: __m5 #[inline] #[target_feature(enable = "avxvnni")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbusd) -)] +#[cfg_attr(test, assert_instr(vpdpbusd))] pub fn _mm256_dpbusd_avx_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpbusd256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } } @@ -392,10 +377,7 @@ pub fn _mm256_maskz_dpbusd_epi32(k: __mmask8, src: __m256i, a: __m256i, b: __m25 #[inline] #[target_feature(enable = "avxvnni")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbusd) -)] +#[cfg_attr(test, assert_instr(vpdpbusd))] pub fn _mm_dpbusd_avx_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpbusd128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } } @@ -484,10 +466,7 @@ pub fn _mm512_maskz_dpbusds_epi32(k: __mmask16, src: __m512i, a: __m512i, b: __m #[inline] #[target_feature(enable = "avxvnni")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbusds) -)] +#[cfg_attr(test, assert_instr(vpdpbusds))] pub fn _mm256_dpbusds_avx_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpbusds256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } } @@ -537,10 +516,7 @@ pub fn _mm256_maskz_dpbusds_epi32(k: __mmask8, src: __m256i, a: __m256i, b: __m2 #[inline] #[target_feature(enable = "avxvnni")] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbusds) -)] +#[cfg_attr(test, assert_instr(vpdpbusds))] pub fn _mm_dpbusds_avx_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpbusds128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } } @@ -591,10 +567,7 @@ pub fn _mm_maskz_dpbusds_epi32(k: __mmask8, src: __m128i, a: __m128i, b: __m128i /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpbssd_epi32&expand=2674) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbssd) -)] +#[cfg_attr(test, assert_instr(vpdpbssd))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpbssd_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpbssd_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -607,10 +580,7 @@ pub fn _mm_dpbssd_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpbssd_epi32&expand=2675) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbssd) -)] +#[cfg_attr(test, assert_instr(vpdpbssd))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpbssd_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpbssd_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -623,10 +593,7 @@ pub fn _mm256_dpbssd_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpbssds_epi32&expand=2676) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbssds) -)] +#[cfg_attr(test, assert_instr(vpdpbssds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpbssds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpbssds_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -639,10 +606,7 @@ pub fn _mm_dpbssds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpbssds_epi32&expand=2677) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbssds) -)] +#[cfg_attr(test, assert_instr(vpdpbssds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpbssds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpbssds_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -655,10 +619,7 @@ pub fn _mm256_dpbssds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpbsud_epi32&expand=2678) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbsud) -)] +#[cfg_attr(test, assert_instr(vpdpbsud))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpbsud_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpbsud_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -671,10 +632,7 @@ pub fn _mm_dpbsud_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpbsud_epi32&expand=2679) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbsud) -)] +#[cfg_attr(test, assert_instr(vpdpbsud))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpbsud_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpbsud_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -687,10 +645,7 @@ pub fn _mm256_dpbsud_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpbsuds_epi32&expand=2680) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbsuds) -)] +#[cfg_attr(test, assert_instr(vpdpbsuds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpbsuds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpbsuds_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -703,10 +658,7 @@ pub fn _mm_dpbsuds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpbsuds_epi32&expand=2681) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbsuds) -)] +#[cfg_attr(test, assert_instr(vpdpbsuds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpbsuds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpbsuds_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -719,10 +671,7 @@ pub fn _mm256_dpbsuds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpbuud_epi32&expand=2708) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbuud) -)] +#[cfg_attr(test, assert_instr(vpdpbuud))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpbuud_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpbuud_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -735,10 +684,7 @@ pub fn _mm_dpbuud_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpbuud_epi32&expand=2709) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbuud) -)] +#[cfg_attr(test, assert_instr(vpdpbuud))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpbuud_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpbuud_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -751,10 +697,7 @@ pub fn _mm256_dpbuud_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpbuuds_epi32&expand=2710) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbuuds) -)] +#[cfg_attr(test, assert_instr(vpdpbuuds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpbuuds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpbuuds_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -767,10 +710,7 @@ pub fn _mm_dpbuuds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpbuuds_epi32&expand=2711) #[inline] #[target_feature(enable = "avxvnniint8")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpbuuds) -)] +#[cfg_attr(test, assert_instr(vpdpbuuds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpbuuds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpbuuds_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -783,10 +723,7 @@ pub fn _mm256_dpbuuds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpwsud_epi32&expand=2738) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwsud) -)] +#[cfg_attr(test, assert_instr(vpdpwsud))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpwsud_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpwsud_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -799,10 +736,7 @@ pub fn _mm_dpwsud_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpwsud_epi32&expand=2739) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwsud) -)] +#[cfg_attr(test, assert_instr(vpdpwsud))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpwsud_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpwsud_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -815,10 +749,7 @@ pub fn _mm256_dpwsud_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpwsuds_epi32&expand=2740) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwsuds) -)] +#[cfg_attr(test, assert_instr(vpdpwsuds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpwsuds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpwsuds_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -831,10 +762,7 @@ pub fn _mm_dpwsuds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpwsuds_epi32&expand=2741) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwsuds) -)] +#[cfg_attr(test, assert_instr(vpdpwsuds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpwsuds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpwsuds_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -847,10 +775,7 @@ pub fn _mm256_dpwsuds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpwusd_epi32&expand=2742) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwusd) -)] +#[cfg_attr(test, assert_instr(vpdpwusd))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpwusd_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpwusd_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -863,10 +788,7 @@ pub fn _mm_dpwusd_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpwusd_epi32&expand=2743) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwusd) -)] +#[cfg_attr(test, assert_instr(vpdpwusd))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpwusd_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpwusd_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -879,10 +801,7 @@ pub fn _mm256_dpwusd_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpwusds_epi32&expand=2744) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwusds) -)] +#[cfg_attr(test, assert_instr(vpdpwusds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpwusds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpwusds_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -895,10 +814,7 @@ pub fn _mm_dpwusds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpwusds_epi32&expand=2745) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwusds) -)] +#[cfg_attr(test, assert_instr(vpdpwusds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpwusds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpwusds_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -911,10 +827,7 @@ pub fn _mm256_dpwusds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpwuud_epi32&expand=2746) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwuud) -)] +#[cfg_attr(test, assert_instr(vpdpwuud))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpwuud_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpwuud_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -927,10 +840,7 @@ pub fn _mm_dpwuud_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpwuud_epi32&expand=2747) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwuud) -)] +#[cfg_attr(test, assert_instr(vpdpwuud))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpwuud_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpwuud_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } @@ -943,10 +853,7 @@ pub fn _mm256_dpwuud_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_dpwuuds_epi32&expand=2748) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwuuds) -)] +#[cfg_attr(test, assert_instr(vpdpwuuds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_dpwuuds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { unsafe { transmute(vpdpwuuds_128(src.as_i32x4(), a.as_i32x4(), b.as_i32x4())) } @@ -959,10 +866,7 @@ pub fn _mm_dpwuuds_epi32(src: __m128i, a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_dpwuuds_epi32&expand=2749) #[inline] #[target_feature(enable = "avxvnniint16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vpdpwuuds) -)] +#[cfg_attr(test, assert_instr(vpdpwuuds))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_dpwuuds_epi32(src: __m256i, a: __m256i, b: __m256i) -> __m256i { unsafe { transmute(vpdpwuuds_256(src.as_i32x8(), a.as_i32x8(), b.as_i32x8())) } diff --git a/crates/core_arch/src/x86/avxneconvert.rs b/crates/core_arch/src/x86/avxneconvert.rs index cae48509ea..1bc68d5548 100644 --- a/crates/core_arch/src/x86/avxneconvert.rs +++ b/crates/core_arch/src/x86/avxneconvert.rs @@ -11,10 +11,7 @@ use stdarch_test::assert_instr; /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_bcstnebf16_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vbcstnebf162ps) -)] +#[cfg_attr(test, assert_instr(vbcstnebf162ps))] #[unstable(feature = "stdarch_x86_avx512_bf16", issue = "127356")] pub unsafe fn _mm_bcstnebf16_ps(a: *const bf16) -> __m128 { bcstnebf162ps_128(a) @@ -27,10 +24,7 @@ pub unsafe fn _mm_bcstnebf16_ps(a: *const bf16) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_bcstnebf16_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vbcstnebf162ps) -)] +#[cfg_attr(test, assert_instr(vbcstnebf162ps))] #[unstable(feature = "stdarch_x86_avx512_bf16", issue = "127356")] pub unsafe fn _mm256_bcstnebf16_ps(a: *const bf16) -> __m256 { bcstnebf162ps_256(a) @@ -43,10 +37,7 @@ pub unsafe fn _mm256_bcstnebf16_ps(a: *const bf16) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_bcstnesh_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vbcstnesh2ps) -)] +#[cfg_attr(test, assert_instr(vbcstnesh2ps))] #[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")] pub unsafe fn _mm_bcstnesh_ps(a: *const f16) -> __m128 { bcstnesh2ps_128(a) @@ -59,10 +50,7 @@ pub unsafe fn _mm_bcstnesh_ps(a: *const f16) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_bcstnesh_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vbcstnesh2ps) -)] +#[cfg_attr(test, assert_instr(vbcstnesh2ps))] #[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")] pub unsafe fn _mm256_bcstnesh_ps(a: *const f16) -> __m256 { bcstnesh2ps_256(a) @@ -74,10 +62,7 @@ pub unsafe fn _mm256_bcstnesh_ps(a: *const f16) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtneebf16_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vcvtneebf162ps) -)] +#[cfg_attr(test, assert_instr(vcvtneebf162ps))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub unsafe fn _mm_cvtneebf16_ps(a: *const __m128bh) -> __m128 { transmute(cvtneebf162ps_128(a)) @@ -89,10 +74,7 @@ pub unsafe fn _mm_cvtneebf16_ps(a: *const __m128bh) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_cvtneebf16_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vcvtneebf162ps) -)] +#[cfg_attr(test, assert_instr(vcvtneebf162ps))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub unsafe fn _mm256_cvtneebf16_ps(a: *const __m256bh) -> __m256 { transmute(cvtneebf162ps_256(a)) @@ -104,10 +86,7 @@ pub unsafe fn _mm256_cvtneebf16_ps(a: *const __m256bh) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtneeph_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vcvtneeph2ps) -)] +#[cfg_attr(test, assert_instr(vcvtneeph2ps))] #[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")] pub unsafe fn _mm_cvtneeph_ps(a: *const __m128h) -> __m128 { transmute(cvtneeph2ps_128(a)) @@ -119,10 +98,7 @@ pub unsafe fn _mm_cvtneeph_ps(a: *const __m128h) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_cvtneeph_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vcvtneeph2ps) -)] +#[cfg_attr(test, assert_instr(vcvtneeph2ps))] #[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")] pub unsafe fn _mm256_cvtneeph_ps(a: *const __m256h) -> __m256 { transmute(cvtneeph2ps_256(a)) @@ -134,10 +110,7 @@ pub unsafe fn _mm256_cvtneeph_ps(a: *const __m256h) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtneobf16_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vcvtneobf162ps) -)] +#[cfg_attr(test, assert_instr(vcvtneobf162ps))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub unsafe fn _mm_cvtneobf16_ps(a: *const __m128bh) -> __m128 { transmute(cvtneobf162ps_128(a)) @@ -149,10 +122,7 @@ pub unsafe fn _mm_cvtneobf16_ps(a: *const __m128bh) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_cvtneobf16_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vcvtneobf162ps) -)] +#[cfg_attr(test, assert_instr(vcvtneobf162ps))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub unsafe fn _mm256_cvtneobf16_ps(a: *const __m256bh) -> __m256 { transmute(cvtneobf162ps_256(a)) @@ -164,10 +134,7 @@ pub unsafe fn _mm256_cvtneobf16_ps(a: *const __m256bh) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtneoph_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vcvtneoph2ps) -)] +#[cfg_attr(test, assert_instr(vcvtneoph2ps))] #[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")] pub unsafe fn _mm_cvtneoph_ps(a: *const __m128h) -> __m128 { transmute(cvtneoph2ps_128(a)) @@ -179,10 +146,7 @@ pub unsafe fn _mm_cvtneoph_ps(a: *const __m128h) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_cvtneoph_ps) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vcvtneoph2ps) -)] +#[cfg_attr(test, assert_instr(vcvtneoph2ps))] #[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")] pub unsafe fn _mm256_cvtneoph_ps(a: *const __m256h) -> __m256 { transmute(cvtneoph2ps_256(a)) @@ -194,10 +158,7 @@ pub unsafe fn _mm256_cvtneoph_ps(a: *const __m256h) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtneps_avx_pbh) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vcvtneps2bf16) -)] +#[cfg_attr(test, assert_instr(vcvtneps2bf16))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm_cvtneps_avx_pbh(a: __m128) -> __m128bh { unsafe { @@ -218,10 +179,7 @@ pub fn _mm_cvtneps_avx_pbh(a: __m128) -> __m128bh { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_cvtneps_avx_pbh) #[inline] #[target_feature(enable = "avxneconvert")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(vcvtneps2bf16) -)] +#[cfg_attr(test, assert_instr(vcvtneps2bf16))] #[unstable(feature = "stdarch_x86_avx512", issue = "111137")] pub fn _mm256_cvtneps_avx_pbh(a: __m256) -> __m128bh { unsafe { diff --git a/crates/core_arch/src/x86/sse.rs b/crates/core_arch/src/x86/sse.rs index 4917a0846a..c31d6541a9 100644 --- a/crates/core_arch/src/x86/sse.rs +++ b/crates/core_arch/src/x86/sse.rs @@ -1067,7 +1067,7 @@ pub fn _mm_unpacklo_ps(a: __m128, b: __m128) -> __m128 { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_movehl_ps) #[inline] #[target_feature(enable = "sse")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movhlps))] +#[cfg_attr(test, assert_instr(movhlps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_movehl_ps(a: __m128, b: __m128) -> __m128 { // TODO; figure why this is a different instruction on msvc? @@ -1080,7 +1080,7 @@ pub fn _mm_movehl_ps(a: __m128, b: __m128) -> __m128 { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_movelh_ps) #[inline] #[target_feature(enable = "sse")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movlhps))] +#[cfg_attr(test, assert_instr(movlhps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_movelh_ps(a: __m128, b: __m128) -> __m128 { unsafe { simd_shuffle!(a, b, [0, 1, 4, 5]) } diff --git a/crates/core_arch/src/x86/sse2.rs b/crates/core_arch/src/x86/sse2.rs index 7559f9ffe4..aeba43e1da 100644 --- a/crates/core_arch/src/x86/sse2.rs +++ b/crates/core_arch/src/x86/sse2.rs @@ -1385,10 +1385,7 @@ pub unsafe fn _mm_stream_si32(mem_addr: *mut i32, a: i32) { #[inline] #[target_feature(enable = "sse2")] // FIXME movd on msvc, movd on i686 -#[cfg_attr( - all(test, not(target_env = "msvc"), target_arch = "x86_64"), - assert_instr(movq) -)] +#[cfg_attr(all(test, target_arch = "x86_64"), assert_instr(movq))] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_move_epi64(a: __m128i) -> __m128i { unsafe { @@ -1668,7 +1665,7 @@ pub fn _mm_unpacklo_epi32(a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_unpacklo_epi64) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movlhps))] +#[cfg_attr(test, assert_instr(movlhps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_unpacklo_epi64(a: __m128i, b: __m128i) -> __m128i { unsafe { transmute::(simd_shuffle!(a.as_i64x2(), b.as_i64x2(), [0, 2])) } @@ -2618,7 +2615,7 @@ pub unsafe fn _mm_stream_pd(mem_addr: *mut f64, a: __m128d) { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_store_sd) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movlps))] +#[cfg_attr(test, assert_instr(movlps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_store_sd(mem_addr: *mut f64, a: __m128d) { *mem_addr = simd_extract!(a, 0) @@ -2736,7 +2733,7 @@ pub unsafe fn _mm_storer_pd(mem_addr: *mut f64, a: __m128d) { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_storeh_pd) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movhps))] +#[cfg_attr(test, assert_instr(movhps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_storeh_pd(mem_addr: *mut f64, a: __m128d) { *mem_addr = simd_extract!(a, 1); @@ -2748,7 +2745,7 @@ pub unsafe fn _mm_storeh_pd(mem_addr: *mut f64, a: __m128d) { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_storel_pd) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movlps))] +#[cfg_attr(test, assert_instr(movlps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_storel_pd(mem_addr: *mut f64, a: __m128d) { *mem_addr = simd_extract!(a, 0); @@ -3006,7 +3003,7 @@ pub fn _mm_unpackhi_pd(a: __m128d, b: __m128d) -> __m128d { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_unpacklo_pd) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movlhps))] +#[cfg_attr(test, assert_instr(movlhps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_unpacklo_pd(a: __m128d, b: __m128d) -> __m128d { unsafe { simd_shuffle!(a, b, [0, 2]) } diff --git a/crates/core_arch/src/x86/sse41.rs b/crates/core_arch/src/x86/sse41.rs index d662ceaf38..9aa200dfc0 100644 --- a/crates/core_arch/src/x86/sse41.rs +++ b/crates/core_arch/src/x86/sse41.rs @@ -204,7 +204,7 @@ pub fn _mm_blend_ps(a: __m128, b: __m128) -> __m128 { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_extract_ps) #[inline] #[target_feature(enable = "sse4.1")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(extractps, IMM8 = 0))] +#[cfg_attr(test, assert_instr(extractps, IMM8 = 0))] #[rustc_legacy_const_generics(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_extract_ps(a: __m128) -> i32 { @@ -233,7 +233,7 @@ pub fn _mm_extract_epi8(a: __m128i) -> i32 { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_extract_epi32) #[inline] #[target_feature(enable = "sse4.1")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(extractps, IMM8 = 1))] +#[cfg_attr(test, assert_instr(extractps, IMM8 = 1))] #[rustc_legacy_const_generics(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_extract_epi32(a: __m128i) -> i32 { diff --git a/crates/core_arch/src/x86/xsave.rs b/crates/core_arch/src/x86/xsave.rs index b5dc73c068..10266662e1 100644 --- a/crates/core_arch/src/x86/xsave.rs +++ b/crates/core_arch/src/x86/xsave.rs @@ -185,7 +185,6 @@ mod tests { } } - #[cfg_attr(stdarch_intel_sde, ignore)] #[simd_test(enable = "xsave")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri unsafe fn test_xsave() { @@ -208,7 +207,6 @@ mod tests { assert_eq!(xcr, xcr_cpy); } - #[cfg_attr(stdarch_intel_sde, ignore)] #[simd_test(enable = "xsave,xsaveopt")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri unsafe fn test_xsaveopt() { diff --git a/crates/core_arch/src/x86_64/amx.rs b/crates/core_arch/src/x86_64/amx.rs index 4fd086dce1..4b33c0ab6c 100644 --- a/crates/core_arch/src/x86_64/amx.rs +++ b/crates/core_arch/src/x86_64/amx.rs @@ -191,10 +191,7 @@ pub unsafe fn _tile_dpbuud() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-fp16")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(tdpfp16ps, DST = 0, A = 1, B = 2) -)] +#[cfg_attr(test, assert_instr(tdpfp16ps, DST = 0, A = 1, B = 2))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_dpfp16ps() { static_assert_uimm_bits!(DST, 3); @@ -215,10 +212,7 @@ pub unsafe fn _tile_dpfp16ps() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-complex")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(tcmmimfp16ps, DST = 0, A = 1, B = 2) -)] +#[cfg_attr(test, assert_instr(tcmmimfp16ps, DST = 0, A = 1, B = 2))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_cmmimfp16ps() { static_assert_uimm_bits!(DST, 3); @@ -239,10 +233,7 @@ pub unsafe fn _tile_cmmimfp16ps() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-complex")] -#[cfg_attr( - all(test, any(target_os = "linux", target_env = "msvc")), - assert_instr(tcmmrlfp16ps, DST = 0, A = 1, B = 2) -)] +#[cfg_attr(test, assert_instr(tcmmrlfp16ps, DST = 0, A = 1, B = 2))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_cmmrlfp16ps() { static_assert_uimm_bits!(DST, 3); diff --git a/crates/core_arch/src/x86_64/sse2.rs b/crates/core_arch/src/x86_64/sse2.rs index 760661f0d2..475e2d2a83 100644 --- a/crates/core_arch/src/x86_64/sse2.rs +++ b/crates/core_arch/src/x86_64/sse2.rs @@ -92,7 +92,7 @@ pub unsafe fn _mm_stream_si64(mem_addr: *mut i64, a: i64) { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_cvtsi64_si128) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movq))] +#[cfg_attr(test, assert_instr(movq))] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_cvtsi64_si128(a: i64) -> __m128i { _mm_set_epi64x(0, a) @@ -104,7 +104,7 @@ pub fn _mm_cvtsi64_si128(a: i64) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_cvtsi64x_si128) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movq))] +#[cfg_attr(test, assert_instr(movq))] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_cvtsi64x_si128(a: i64) -> __m128i { _mm_cvtsi64_si128(a) @@ -115,7 +115,7 @@ pub fn _mm_cvtsi64x_si128(a: i64) -> __m128i { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_cvtsi128_si64) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movq))] +#[cfg_attr(test, assert_instr(movq))] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_cvtsi128_si64(a: __m128i) -> i64 { unsafe { simd_extract!(a.as_i64x2(), 0) } @@ -126,7 +126,7 @@ pub fn _mm_cvtsi128_si64(a: __m128i) -> i64 { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_cvtsi128_si64x) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(movq))] +#[cfg_attr(test, assert_instr(movq))] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_cvtsi128_si64x(a: __m128i) -> i64 { _mm_cvtsi128_si64(a) diff --git a/crates/core_arch/src/x86_64/sse41.rs b/crates/core_arch/src/x86_64/sse41.rs index e57ffac1ca..4b7d25f214 100644 --- a/crates/core_arch/src/x86_64/sse41.rs +++ b/crates/core_arch/src/x86_64/sse41.rs @@ -10,7 +10,7 @@ use stdarch_test::assert_instr; /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_extract_epi64) #[inline] #[target_feature(enable = "sse4.1")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(pextrq, IMM1 = 1))] +#[cfg_attr(test, assert_instr(pextrq, IMM1 = 1))] #[rustc_legacy_const_generics(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub fn _mm_extract_epi64(a: __m128i) -> i64 { diff --git a/crates/core_arch/src/x86_64/xsave.rs b/crates/core_arch/src/x86_64/xsave.rs index d8e72969ed..ca2367307f 100644 --- a/crates/core_arch/src/x86_64/xsave.rs +++ b/crates/core_arch/src/x86_64/xsave.rs @@ -149,7 +149,6 @@ mod tests { } } - #[cfg_attr(stdarch_intel_sde, ignore)] #[simd_test(enable = "xsave")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri unsafe fn test_xsave64() { @@ -162,7 +161,6 @@ mod tests { xsave::_xsave64(b.ptr(), m); } - #[cfg_attr(stdarch_intel_sde, ignore)] #[simd_test(enable = "xsave,xsaveopt")] #[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri unsafe fn test_xsaveopt64() { diff --git a/crates/simd-test-macro/src/lib.rs b/crates/simd-test-macro/src/lib.rs index 2855888ceb..9397c0452e 100644 --- a/crates/simd-test-macro/src/lib.rs +++ b/crates/simd-test-macro/src/lib.rs @@ -51,7 +51,6 @@ pub fn simd_test( let target = env::var("TARGET").expect( "TARGET environment variable should be set for rustc (e.g. TARGET=x86_64-apple-darwin cargo test)" ); - let mut force_test = false; let macro_test = match target .split('-') .next() @@ -63,27 +62,29 @@ pub fn simd_test( maybe_riscv if maybe_riscv.starts_with("riscv") => "is_riscv_feature_detected", "powerpc" | "powerpcle" => "is_powerpc_feature_detected", "powerpc64" | "powerpc64le" => "is_powerpc64_feature_detected", - "mips" | "mipsel" | "mipsisa32r6" | "mipsisa32r6el" => { - // FIXME: - // On MIPS CI run-time feature detection always returns false due - // to this qemu bug: https://bugs.launchpad.net/qemu/+bug/1754372 - // - // This is a workaround to force the MIPS tests to always run on - // CI. - force_test = true; - "is_mips_feature_detected" - } - "mips64" | "mips64el" | "mipsisa64r6" | "mipsisa64r6el" => { - // FIXME: see above - force_test = true; - "is_mips64_feature_detected" - } "loongarch64" => "is_loongarch_feature_detected", "s390x" => "is_s390x_feature_detected", t => panic!("unknown target: {t}"), }; let macro_test = Ident::new(macro_test, Span::call_site()); + let skipped_functions = env::var("STDARCH_TEST_SKIP_FUNCTION").unwrap_or_default(); + let skipped_features = env::var("STDARCH_TEST_SKIP_FEATURE").unwrap_or_default(); + + let mut name_str = &*name.to_string(); + if name_str.starts_with("test_") { + name_str = &name_str[5..]; + } + + let skip_this = skipped_functions + .split(',') + .map(str::trim) + .any(|s| s == name_str) + || skipped_features + .split(',') + .map(str::trim) + .any(|s| target_features.iter().any(|feature| s == feature)); + let mut detect_missing_features = TokenStream::new(); for feature in target_features { let q = quote_spanned! { @@ -95,8 +96,7 @@ pub fn simd_test( q.to_tokens(&mut detect_missing_features); } - let test_norun = std::env::var("STDSIMD_TEST_NORUN").is_ok(); - let maybe_ignore = if test_norun { + let maybe_ignore = if skip_this { quote! { #[ignore] } } else { TokenStream::new() @@ -111,7 +111,7 @@ pub fn simd_test( fn #name() { let mut missing_features = ::std::vec::Vec::new(); #detect_missing_features - if #force_test || missing_features.is_empty() { + if missing_features.is_empty() { let v = unsafe { #name() }; return v; } else { diff --git a/crates/std_detect/Cargo.toml b/crates/std_detect/Cargo.toml index 6f4f1c7b61..b6741100a7 100644 --- a/crates/std_detect/Cargo.toml +++ b/crates/std_detect/Cargo.toml @@ -31,14 +31,10 @@ alloc = { version = "1.0.0", optional = true, package = "rustc-std-workspace-all [target.'cfg(not(windows))'.dependencies] libc = { version = "0.2.0", optional = true, default-features = false } -[dev-dependencies] -cupid = "0.6.0" - [features] default = [ "std_detect_dlsym_getauxval", "std_detect_file_io" ] std_detect_file_io = [ "libc" ] std_detect_dlsym_getauxval = [ "libc" ] -std_detect_env_override = [ "libc" ] rustc-dep-of-std = [ "core", "compiler_builtins", diff --git a/crates/std_detect/README.md b/crates/std_detect/README.md index 0053d777aa..5e9706fde6 100644 --- a/crates/std_detect/README.md +++ b/crates/std_detect/README.md @@ -52,8 +52,7 @@ crate from working on applications in which `std` is not available. * All `x86`/`x86_64` targets are supported on all platforms by querying the `cpuid` instruction directly for the features supported by the hardware and the operating system. `std_detect` assumes that the binary is an user-space - application. If you need raw support for querying `cpuid`, consider using the - [`cupid`](https://crates.io/crates/cupid) crate. + application. * Linux/Android: * `arm{32, 64}`, `mips{32,64}{,el}`, `powerpc{32,64}{,le}`, `loongarch64`, `s390x`: diff --git a/crates/std_detect/src/detect/cache.rs b/crates/std_detect/src/detect/cache.rs index 83bcedea61..67a8b1ea09 100644 --- a/crates/std_detect/src/detect/cache.rs +++ b/crates/std_detect/src/detect/cache.rs @@ -121,65 +121,12 @@ impl Cache { } } -cfg_if::cfg_if! { - if #[cfg(feature = "std_detect_env_override")] { - #[inline] - fn disable_features(disable: &[u8], value: &mut Initializer) { - if let Ok(disable) = core::str::from_utf8(disable) { - for v in disable.split(" ") { - let _ = super::Feature::from_str(v).map(|v| value.unset(v as u32)); - } - } - } - - #[inline] - fn initialize(mut value: Initializer) -> Initializer { - use core::ffi::CStr; - const RUST_STD_DETECT_UNSTABLE: &CStr = c"RUST_STD_DETECT_UNSTABLE"; - cfg_if::cfg_if! { - if #[cfg(windows)] { - use alloc::vec; - #[link(name = "kernel32")] - unsafe extern "system" { - fn GetEnvironmentVariableA(name: *const u8, buffer: *mut u8, size: u32) -> u32; - } - let len = unsafe { GetEnvironmentVariableA(RUST_STD_DETECT_UNSTABLE.as_ptr().cast::(), core::ptr::null_mut(), 0) }; - if len > 0 { - // +1 to include the null terminator. - let mut env = vec![0; len as usize + 1]; - let len = unsafe { GetEnvironmentVariableA(RUST_STD_DETECT_UNSTABLE.as_ptr().cast::(), env.as_mut_ptr(), len + 1) }; - if len > 0 { - disable_features(&env[..len as usize], &mut value); - } - } - } else { - let env = unsafe { - libc::getenv(RUST_STD_DETECT_UNSTABLE.as_ptr()) - }; - if !env.is_null() { - let len = unsafe { libc::strlen(env) }; - let env = unsafe { core::slice::from_raw_parts(env as *const u8, len) }; - disable_features(env, &mut value); - } - } - } - do_initialize(value); - value - } - } else { - #[inline] - fn initialize(value: Initializer) -> Initializer { - do_initialize(value); - value - } - } -} - #[inline] -fn do_initialize(value: Initializer) { +fn initialize(value: Initializer) -> Initializer { CACHE[0].initialize((value.0) as usize & Cache::MASK); CACHE[1].initialize((value.0 >> Cache::CAPACITY) as usize & Cache::MASK); CACHE[2].initialize((value.0 >> (2 * Cache::CAPACITY)) as usize & Cache::MASK); + value } // We only have to detect features once, and it's fairly costly, so hint to LLVM @@ -204,10 +151,6 @@ fn detect_and_initialize() -> Initializer { /// /// It uses the `Feature` variant to index into this variable as a bitset. If /// the bit is set, the feature is enabled, and otherwise it is disabled. -/// -/// If the feature `std_detect_env_override` is enabled looks for the env -/// variable `RUST_STD_DETECT_UNSTABLE` and uses its content to disable -/// Features that would had been otherwise detected. #[inline] pub(crate) fn test(bit: u32) -> bool { let (relative_bit, idx) = if bit < Cache::CAPACITY { diff --git a/crates/std_detect/src/detect/macros.rs b/crates/std_detect/src/detect/macros.rs index 9315b5ea31..64711c189a 100644 --- a/crates/std_detect/src/detect/macros.rs +++ b/crates/std_detect/src/detect/macros.rs @@ -168,13 +168,6 @@ macro_rules! features { Feature::_last => unreachable!(), } } - #[cfg(feature = "std_detect_env_override")] - pub(crate) fn from_str(s: &str) -> Result { - match s { - $($feature_lit => Ok(Feature::$feature),)* - _ => Err(()) - } - } } /// Each function performs run-time feature detection for a single diff --git a/crates/std_detect/tests/x86-specific.rs b/crates/std_detect/tests/x86-specific.rs index f41f400c10..2b6a394910 100644 --- a/crates/std_detect/tests/x86-specific.rs +++ b/crates/std_detect/tests/x86-specific.rs @@ -10,7 +10,6 @@ movrs_target_feature )] -extern crate cupid; #[macro_use] extern crate std_detect; @@ -109,96 +108,6 @@ fn dump() { println!("amx-movrs: {:?}", is_x86_feature_detected!("amx-movrs")); } -#[cfg(feature = "std_detect_env_override")] -#[test] -fn env_override_no_avx() { - if let Ok(disable) = std::env::var("RUST_STD_DETECT_UNSTABLE") { - let information = cupid::master().unwrap(); - for d in disable.split(" ") { - match d { - "avx" => { - if information.avx() { - assert_ne!(is_x86_feature_detected!("avx"), information.avx()) - } - } - "avx2" => { - if information.avx2() { - assert_ne!(is_x86_feature_detected!("avx2"), information.avx2()) - } - } - _ => {} - } - } - } -} - -#[test] -fn compare_with_cupid() { - let information = cupid::master().unwrap(); - assert_eq!(is_x86_feature_detected!("aes"), information.aesni()); - assert_eq!( - is_x86_feature_detected!("pclmulqdq"), - information.pclmulqdq() - ); - assert_eq!(is_x86_feature_detected!("rdrand"), information.rdrand()); - assert_eq!(is_x86_feature_detected!("rdseed"), information.rdseed()); - assert_eq!(is_x86_feature_detected!("tsc"), information.tsc()); - assert_eq!(is_x86_feature_detected!("sse"), information.sse()); - assert_eq!(is_x86_feature_detected!("sse2"), information.sse2()); - assert_eq!(is_x86_feature_detected!("sse3"), information.sse3()); - assert_eq!(is_x86_feature_detected!("ssse3"), information.ssse3()); - assert_eq!(is_x86_feature_detected!("sse4.1"), information.sse4_1()); - assert_eq!(is_x86_feature_detected!("sse4.2"), information.sse4_2()); - assert_eq!(is_x86_feature_detected!("sse4a"), information.sse4a()); - assert_eq!(is_x86_feature_detected!("sha"), information.sha()); - assert_eq!(is_x86_feature_detected!("f16c"), information.f16c()); - assert_eq!(is_x86_feature_detected!("avx"), information.avx()); - assert_eq!(is_x86_feature_detected!("avx2"), information.avx2()); - assert_eq!(is_x86_feature_detected!("avx512f"), information.avx512f()); - assert_eq!(is_x86_feature_detected!("avx512cd"), information.avx512cd()); - assert_eq!(is_x86_feature_detected!("avx512er"), information.avx512er()); - assert_eq!(is_x86_feature_detected!("avx512pf"), information.avx512pf()); - assert_eq!(is_x86_feature_detected!("avx512bw"), information.avx512bw()); - assert_eq!(is_x86_feature_detected!("avx512dq"), information.avx512dq()); - assert_eq!(is_x86_feature_detected!("avx512vl"), information.avx512vl()); - assert_eq!( - is_x86_feature_detected!("avx512ifma"), - information.avx512_ifma() - ); - assert_eq!( - is_x86_feature_detected!("avx512vbmi"), - information.avx512_vbmi() - ); - assert_eq!( - is_x86_feature_detected!("avx512vpopcntdq"), - information.avx512_vpopcntdq() - ); - assert_eq!(is_x86_feature_detected!("fma"), information.fma()); - assert_eq!(is_x86_feature_detected!("bmi1"), information.bmi1()); - assert_eq!(is_x86_feature_detected!("bmi2"), information.bmi2()); - assert_eq!(is_x86_feature_detected!("popcnt"), information.popcnt()); - assert_eq!(is_x86_feature_detected!("abm"), information.lzcnt()); - assert_eq!(is_x86_feature_detected!("tbm"), information.tbm()); - assert_eq!(is_x86_feature_detected!("lzcnt"), information.lzcnt()); - assert_eq!(is_x86_feature_detected!("xsave"), information.xsave()); - assert_eq!(is_x86_feature_detected!("xsaveopt"), information.xsaveopt()); - assert_eq!( - is_x86_feature_detected!("xsavec"), - information.xsavec_and_xrstor() - ); - assert_eq!( - is_x86_feature_detected!("xsaves"), - information.xsaves_xrstors_and_ia32_xss() - ); - assert_eq!( - is_x86_feature_detected!("cmpxchg16b"), - information.cmpxchg16b(), - ); - assert_eq!(is_x86_feature_detected!("adx"), information.adx(),); - assert_eq!(is_x86_feature_detected!("rtm"), information.rtm(),); - assert_eq!(is_x86_feature_detected!("movbe"), information.movbe(),); -} - #[test] #[allow(deprecated)] fn x86_deprecated() { diff --git a/crates/stdarch-test/src/disassembly.rs b/crates/stdarch-test/src/disassembly.rs index 802b2c2ba9..49043eea80 100644 --- a/crates/stdarch-test/src/disassembly.rs +++ b/crates/stdarch-test/src/disassembly.rs @@ -29,7 +29,7 @@ fn normalize(mut symbol: &str) -> String { // Normalize to no leading underscore to handle platforms that may // inject extra ones in symbol names. - while symbol.starts_with('_') { + while symbol.starts_with('_') || symbol.starts_with('.') { symbol.remove(0); } // Windows/x86 has a suffix such as @@4. diff --git a/crates/stdarch-test/src/lib.rs b/crates/stdarch-test/src/lib.rs index ff224376ec..827a402e3a 100644 --- a/crates/stdarch-test/src/lib.rs +++ b/crates/stdarch-test/src/lib.rs @@ -104,7 +104,12 @@ pub fn assert(shim_addr: usize, fnname: &str, expected: &str) { // failed inlining something. s[0].starts_with("call ") && s[1].starts_with("pop") // FIXME: original logic but does not match comment }) - } else if cfg!(any(target_arch = "aarch64", target_arch = "arm64ec")) { + } else if cfg!(any( + target_arch = "aarch64", + target_arch = "arm64ec", + target_arch = "powerpc", + target_arch = "powerpc64" + )) { instrs.iter().any(|s| s.starts_with("bl ")) } else { // FIXME: Add detection for other archs @@ -203,6 +208,3 @@ pub fn assert_skip_test_ok(name: &str, missing_features: &[&str]) { Err(_) => println!("Set STDARCH_TEST_EVERYTHING to make this an error."), } } - -// See comment in `assert-instr-macro` crate for why this exists -pub static mut _DONT_DEDUP: *const u8 = std::ptr::null(); diff --git a/crates/stdarch-verify/tests/x86-intel.rs b/crates/stdarch-verify/tests/x86-intel.rs index cb772ac882..6719c06608 100644 --- a/crates/stdarch-verify/tests/x86-intel.rs +++ b/crates/stdarch-verify/tests/x86-intel.rs @@ -749,7 +749,8 @@ fn equate( &Type::PrimUnsigned(32), "unsigned __int32" | "unsigned int" | "unsigned long" | "const unsigned int", ) => {} - (&Type::PrimUnsigned(64), "unsigned __int64" | "size_t") => {} + (&Type::PrimUnsigned(64), "unsigned __int64") => {} + (&Type::PrimUnsigned(SS), "size_t") => {} (&Type::M128, "__m128") => {} (&Type::M128BH, "__m128bh") => {}