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Fix timer9 pclk and ppre
1 parent fcdb480 commit 2fa0098

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3 files changed

+34
-29
lines changed

3 files changed

+34
-29
lines changed

CHANGELOG.md

+1
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
1010
### Changed
1111

1212
- Wait 16 cycles after setting prescalers for some clock domains to follow manual.
13+
- Fixed `TIM9` `pclk` and `ppre`.
1314

1415
### Added
1516

src/pwm.rs

+32-28
Original file line numberDiff line numberDiff line change
@@ -135,13 +135,14 @@ macro_rules! pwm_all_channels {
135135
T: Into<Hertz>,
136136
{
137137
{
138-
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
139-
let rcc = unsafe {&(*RCC::ptr())};
140-
141-
// Enable and reset the timer peripheral, it's the same bit position for both registers
142-
bb::set(&rcc.$apbenr, $bit);
143-
bb::set(&rcc.$apbrstr, $bit);
144-
bb::clear(&rcc.$apbrstr, $bit);
138+
unsafe {
139+
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
140+
let rcc = &(*RCC::ptr());
141+
// Enable and reset the timer peripheral, it's the same bit position for both registers
142+
bb::set(&rcc.$apbenr, $bit);
143+
bb::set(&rcc.$apbrstr, $bit);
144+
bb::clear(&rcc.$apbrstr, $bit);
145+
}
145146
}
146147
if PINS::C1 {
147148
tim.ccmr1_output()
@@ -320,13 +321,14 @@ macro_rules! pwm_2_channels {
320321
T: Into<Hertz>,
321322
{
322323
{
323-
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
324-
let rcc = unsafe {&(*RCC::ptr())};
325-
326-
// Enable and reset the timer peripheral, it's the same bit position for both registers
327-
bb::set(&rcc.$apbenr, $bit);
328-
bb::set(&rcc.$apbrstr, $bit);
329-
bb::clear(&rcc.$apbrstr, $bit);
324+
unsafe {
325+
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
326+
let rcc = &(*RCC::ptr());
327+
// Enable and reset the timer peripheral, it's the same bit position for both registers
328+
bb::set(&rcc.$apbenr, $bit);
329+
bb::set(&rcc.$apbrstr, $bit);
330+
bb::clear(&rcc.$apbrstr, $bit);
331+
}
330332
}
331333
if PINS::C1 {
332334
//NOTE(unsafe) 6 is a valid value to write to oc1m
@@ -438,13 +440,14 @@ macro_rules! pwm_1_channel {
438440
T: Into<Hertz>,
439441
{
440442
{
441-
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
442-
let rcc = unsafe {&(*RCC::ptr())};
443-
444-
// Enable and reset the timer peripheral, it's the same bit position for both registers
445-
bb::set(&rcc.$apbenr, $bit);
446-
bb::set(&rcc.$apbrstr, $bit);
447-
bb::clear(&rcc.$apbrstr, $bit);
443+
unsafe {
444+
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
445+
let rcc = &(*RCC::ptr());
446+
// Enable and reset the timer peripheral, it's the same bit position for both registers
447+
bb::set(&rcc.$apbenr, $bit);
448+
bb::set(&rcc.$apbrstr, $bit);
449+
bb::clear(&rcc.$apbrstr, $bit);
450+
}
448451
}
449452
if PINS::C1 {
450453
//NOTE(unsafe) 6 is a valid value to write to oc1m
@@ -521,13 +524,14 @@ macro_rules! pwm_tim5_f410 {
521524
T: Into<Hertz>,
522525
{
523526
{
524-
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
525-
let rcc = unsafe {&(*RCC::ptr())};
526-
527-
// Enable and reset the timer peripheral, it's the same bit position for both registers
528-
bb::set(&rcc.$apbenr, $bit);
529-
bb::set(&rcc.$apbrstr, $bit);
530-
bb::clear(&rcc.$apbrstr, $bit);
527+
unsafe {
528+
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
529+
let rcc = &(*RCC::ptr());
530+
// Enable and reset the timer peripheral, it's the same bit position for both registers
531+
bb::set(&rcc.$apbenr, $bit);
532+
bb::set(&rcc.$apbrstr, $bit);
533+
bb::clear(&rcc.$apbrstr, $bit);
534+
}
531535
}
532536
if PINS::C1 {
533537
tim.ccmr1_output()

src/timer.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -301,7 +301,7 @@ macro_rules! hal {
301301
hal! {
302302
TIM1: (tim1, tim1en, tim1rst, apb2enr, apb2rstr, pclk2, ppre2),
303303
TIM5: (tim5, tim5en, tim5rst, apb1enr, apb1rstr, pclk1, ppre1),
304-
TIM9: (tim9, tim9en, tim9rst, apb2enr, apb2rstr, pclk1, ppre1),
304+
TIM9: (tim9, tim9en, tim9rst, apb2enr, apb2rstr, pclk2, ppre2),
305305
TIM11: (tim11, tim11en, tim11rst, apb2enr, apb2rstr, pclk2, ppre2),
306306
}
307307

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