From d5e7a87baf13311731e4bb3a218e6e26dc784a48 Mon Sep 17 00:00:00 2001
From: Andrey Zgarbul <zgarbul.andrey@gmail.com>
Date: Sat, 12 Oct 2024 18:24:22 +0300
Subject: [PATCH] remove NoPin, use Option

---
 CHANGELOG.md                                  |   2 +
 examples/analog-stopwatch-with-spi-ssd1306.rs |   8 +-
 examples/i2s-audio-out.rs                     |   3 +-
 examples/ist7920-bidi-normal-spi.rs           |   8 +-
 examples/rtic-dual-i2s-audio-in-out.rs        |  10 +-
 examples/rtic-i2s-audio-in-out.rs             |  12 +-
 examples/rtic-spi-slave-dma.rs                |   8 +-
 examples/sai-duplex.rs                        |   2 +-
 examples/spi-dma.rs                           |  13 +-
 examples/spi_slave.rs                         |  10 +-
 examples/ws2812-spi.rs                        |   4 +-
 src/can.rs                                    |  45 ++----
 src/gpio.rs                                   |  10 --
 src/gpio/alt.rs                               |  28 +---
 src/gpio/alt/f4.rs                            | 104 ++++++-------
 src/i2s.rs                                    |  29 ++--
 src/sai.rs                                    |  20 +--
 src/serial.rs                                 |  44 +++---
 src/serial/uart_impls.rs                      |  52 ++++---
 src/spi.rs                                    | 141 ++++++++----------
 src/uart.rs                                   |   2 +-
 21 files changed, 253 insertions(+), 302 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index a0fd37b3..d973298b 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+ - remove `NoPin`, use `Option` instead
+
  - Fix pac `defmt` feature
 
 ## [v0.22.0] - 2024-10-04
diff --git a/examples/analog-stopwatch-with-spi-ssd1306.rs b/examples/analog-stopwatch-with-spi-ssd1306.rs
index fa57ea0c..868b9e3f 100644
--- a/examples/analog-stopwatch-with-spi-ssd1306.rs
+++ b/examples/analog-stopwatch-with-spi-ssd1306.rs
@@ -88,13 +88,13 @@ fn main() -> ! {
     //cs - pe4
     //dc - pe3
 
-    let sck = gpioe.pe2;
-    let miso = gpioe.pe5;
-    let mosi = gpioe.pe6;
+    let sck = gpioe.pe2.into();
+    let miso = gpioe.pe5.into();
+    let mosi = gpioe.pe6.into();
 
     let spi = Spi::new(
         dp.SPI4,
-        (sck, miso, mosi),
+        (Some(sck), Some(miso), Some(mosi)),
         Mode {
             polarity: Polarity::IdleLow,
             phase: Phase::CaptureOnFirstTransition,
diff --git a/examples/i2s-audio-out.rs b/examples/i2s-audio-out.rs
index c887b807..ad2acaa1 100644
--- a/examples/i2s-audio-out.rs
+++ b/examples/i2s-audio-out.rs
@@ -50,7 +50,6 @@ use cortex_m_rt::entry;
 
 use rtt_target::{rprintln, rtt_init_print};
 
-use stm32f4xx_hal::gpio::NoPin;
 use stm32f4xx_hal::i2s::stm32_i2s_v12x::transfer::*;
 use stm32f4xx_hal::i2s::I2s;
 use stm32f4xx_hal::nb::block;
@@ -104,7 +103,7 @@ fn main() -> ! {
         .i2s_clk(61440.kHz())
         .freeze();
 
-    let i2s_pins = (gpioa.pa4, gpioc.pc10, NoPin::new(), gpioc.pc12);
+    let i2s_pins = (gpioa.pa4, gpioc.pc10, None, gpioc.pc12);
     let i2s = I2s::new(dp.SPI3, i2s_pins, &clocks);
     let i2s_config = I2sTransferConfig::new_master()
         .transmit()
diff --git a/examples/ist7920-bidi-normal-spi.rs b/examples/ist7920-bidi-normal-spi.rs
index 65277b18..ef7504ae 100644
--- a/examples/ist7920-bidi-normal-spi.rs
+++ b/examples/ist7920-bidi-normal-spi.rs
@@ -28,8 +28,8 @@ fn main() -> ! {
     let mut led = gpioa.pa5.into_push_pull_output();
     led.set_low();
 
-    let sck = gpiob.pb3.into_alternate();
-    let mosi = gpiob.pb5;
+    let sck = gpiob.pb3.into_alternate().into();
+    let mosi = gpiob.pb5.into();
 
     let dc = gpiob.pb4.into_push_pull_output();
     let mut res = gpiob.pb10.into_push_pull_output();
@@ -45,7 +45,9 @@ fn main() -> ! {
     // Change spi transfer mode to Bidi for more efficient operations.
     // let spi = Spi::new(dp.SPI1, (sck, miso, mosi), mode, 8.MHz(), &clocks).to_bidi_transfer_mode();
     // or
-    let spi = dp.SPI1.spi_bidi((sck, mosi), mode, 8.MHz(), &clocks);
+    let spi = dp
+        .SPI1
+        .spi_bidi((Some(sck), Some(mosi)), mode, 8.MHz(), &clocks);
 
     let iface = SPIInterface::new(spi, dc, cs);
 
diff --git a/examples/rtic-dual-i2s-audio-in-out.rs b/examples/rtic-dual-i2s-audio-in-out.rs
index aa327a60..eb9ca148 100644
--- a/examples/rtic-dual-i2s-audio-in-out.rs
+++ b/examples/rtic-dual-i2s-audio-in-out.rs
@@ -165,11 +165,11 @@ mod app {
 
         // I2S pins: (WS, CK, MCLK, SD) for I2S2
         let i2s2_pins = (
-            gpiob.pb12, //WS
-            gpiob.pb13, //CK
-            gpioc.pc6,  //MCK
-            gpiob.pb15, //SD
-            gpiob.pb14, //ExtSD
+            gpiob.pb12,             //WS
+            gpiob.pb13,             //CK
+            Some(gpioc.pc6.into()), //MCK
+            gpiob.pb15,             //SD
+            gpiob.pb14,             //ExtSD
         );
         let i2s2 = DualI2s::new(device.SPI2, device.I2S2EXT, i2s2_pins, &clocks);
         let i2s2_config = DualI2sDriverConfig::new_master()
diff --git a/examples/rtic-i2s-audio-in-out.rs b/examples/rtic-i2s-audio-in-out.rs
index c89534ad..99466128 100644
--- a/examples/rtic-i2s-audio-in-out.rs
+++ b/examples/rtic-i2s-audio-in-out.rs
@@ -80,7 +80,7 @@ mod app {
 
     use super::hal;
 
-    use hal::gpio::{Edge, NoPin};
+    use hal::gpio::Edge;
     use hal::i2s::stm32_i2s_v12x::driver::*;
     use hal::i2s::I2s;
     use hal::pac::Interrupt;
@@ -169,10 +169,10 @@ mod app {
 
         // I2S pins: (WS, CK, MCLK, SD) for I2S2
         let i2s2_pins = (
-            gpiob.pb12, //WS
-            gpiob.pb13, //CK
-            gpioc.pc6,  //MCK
-            gpiob.pb15, //SD
+            gpiob.pb12,             //WS
+            gpiob.pb13,             //CK
+            Some(gpioc.pc6.into()), //MCK
+            gpiob.pb15,             //SD
         );
         let i2s2 = I2s::new(device.SPI2, i2s2_pins, &clocks);
         let i2s2_config = I2sDriverConfig::new_master()
@@ -187,7 +187,7 @@ mod app {
         i2s2_driver.set_error_interrupt(true);
 
         // I2S3 pins: (WS, CK, NoPin, SD) for I2S3
-        let i2s3_pins = (gpioa.pa4, gpioc.pc10, NoPin::new(), gpioc.pc12);
+        let i2s3_pins = (gpioa.pa4, gpioc.pc10, None, gpioc.pc12);
         let i2s3 = I2s::new(device.SPI3, i2s3_pins, &clocks);
         let i2s3_config = i2s2_config.to_slave().transmit();
         let mut i2s3_driver = I2sDriver::new(i2s3, i2s3_config);
diff --git a/examples/rtic-spi-slave-dma.rs b/examples/rtic-spi-slave-dma.rs
index ecfdc77d..374f65db 100644
--- a/examples/rtic-spi-slave-dma.rs
+++ b/examples/rtic-spi-slave-dma.rs
@@ -68,16 +68,16 @@ mod app {
 
         let gpiob = gpiob.split();
 
-        let sck = gpiob.pb3.into_alternate();
-        let miso = gpiob.pb4.into_alternate();
-        let mosi = gpiob.pb5;
+        let sck = gpiob.pb3.into_alternate().into();
+        let miso = gpiob.pb4.into_alternate().into();
+        let mosi = gpiob.pb5.into();
 
         let mode = Mode {
             polarity: Polarity::IdleLow,
             phase: Phase::CaptureOnFirstTransition,
         };
 
-        let mut spi3 = SpiSlave::new(spi, (sck, miso, mosi, None), mode);
+        let mut spi3 = SpiSlave::new(spi, (Some(sck), Some(miso), Some(mosi), None), mode);
         spi3.set_internal_nss(false);
 
         let (tx, rx) = spi3.use_dma().txrx();
diff --git a/examples/sai-duplex.rs b/examples/sai-duplex.rs
index f8143dd1..21e63254 100644
--- a/examples/sai-duplex.rs
+++ b/examples/sai-duplex.rs
@@ -43,7 +43,7 @@ fn main() -> ! {
         num_slots: 2,
     };
     let tx = saia.master_tx(
-        (gpioe.pe2, gpioe.pe4, gpioe.pe5, gpioe.pe6),
+        (Some(gpioe.pe2.into()), gpioe.pe4, gpioe.pe5, gpioe.pe6),
         protocol,
         48.kHz(),
         &clocks,
diff --git a/examples/spi-dma.rs b/examples/spi-dma.rs
index 1a0dfd03..e2e74eff 100644
--- a/examples/spi-dma.rs
+++ b/examples/spi-dma.rs
@@ -48,15 +48,22 @@ fn main() -> ! {
             .pb15
             .into_alternate()
             .speed(Speed::VeryHigh)
-            .internal_pull_up(true);
-        let pb13 = gpiob.pb13.into_alternate().speed(Speed::VeryHigh);
+            .internal_pull_up(true)
+            .into();
+        let pb13 = gpiob.pb13.into_alternate().speed(Speed::VeryHigh).into();
 
         let mode = Mode {
             polarity: Polarity::IdleLow,
             phase: Phase::CaptureOnFirstTransition,
         };
 
-        let spi2 = Spi::new(dp.SPI2, (pb13, NoMiso::new(), pb15), mode, 3.MHz(), &clocks);
+        let spi2 = Spi::new(
+            dp.SPI2,
+            (Some(pb13), None, Some(pb15)),
+            mode,
+            3.MHz(),
+            &clocks,
+        );
 
         let buffer = cortex_m::singleton!(: [u8; ARRAY_SIZE] = [1; ARRAY_SIZE]).unwrap();
 
diff --git a/examples/spi_slave.rs b/examples/spi_slave.rs
index bbf1668a..d2d1b2f9 100644
--- a/examples/spi_slave.rs
+++ b/examples/spi_slave.rs
@@ -24,13 +24,15 @@ fn main() -> ! {
 
     let gpioa = p.GPIOA.split();
 
-    let sck = gpioa.pa5.internal_resistor(Pull::Up);
-    let miso = gpioa.pa6.internal_resistor(Pull::Down);
-    let mosi = gpioa.pa7.internal_resistor(Pull::Down);
+    let sck = gpioa.pa5.internal_resistor(Pull::Up).into();
+    let miso = gpioa.pa6.internal_resistor(Pull::Down).into();
+    let mosi = gpioa.pa7.internal_resistor(Pull::Down).into();
 
     // clock speed is determined by the master
     let nss = gpioa.pa4.internal_resistor(Pull::Up).into();
-    let mut spi = p.SPI1.spi_slave((sck, miso, mosi, Some(nss)), MODE);
+    let mut spi = p
+        .SPI1
+        .spi_slave((Some(sck), Some(miso), Some(mosi), Some(nss)), MODE);
     // alternativelly you could use software `chip select`
     // let mut spi = SpiSlave::new(p.SPI1, (sck, miso, mosi, None), MODE);
     // spi.set_internal_nss(false);
diff --git a/examples/ws2812-spi.rs b/examples/ws2812-spi.rs
index 940e9d53..4f740daa 100644
--- a/examples/ws2812-spi.rs
+++ b/examples/ws2812-spi.rs
@@ -6,7 +6,7 @@ use panic_halt as _;
 use stm32f4xx_hal as hal;
 
 use cortex_m_rt::entry;
-use hal::{gpio::NoPin, pac, prelude::*};
+use hal::{pac, prelude::*};
 use smart_leds::{brightness, hsv::RGB8, SmartLedsWrite};
 use ws2812_spi as ws2812;
 
@@ -22,7 +22,7 @@ fn main() -> ! {
     let gpioa = dp.GPIOA.split();
 
     let spi = dp.SPI1.spi(
-        (gpioa.pa5, NoPin::new(), gpioa.pa7),
+        (Some(gpioa.pa5.into()), None, Some(gpioa.pa7.into())),
         ws2812::MODE,
         3000.kHz(),
         &clocks,
diff --git a/src/can.rs b/src/can.rs
index fd0c5a52..5decaf90 100644
--- a/src/can.rs
+++ b/src/can.rs
@@ -1,7 +1,7 @@
 //! # Controller Area Network (CAN) Interface
 //!
 
-use crate::gpio::{self, NoPin};
+use crate::gpio;
 use crate::pac;
 use crate::rcc;
 
@@ -39,13 +39,9 @@ mod can3 {
 pub trait CanExt: Sized + Instance {
     fn can(self, pins: (impl Into<Self::Tx>, impl Into<Self::Rx>)) -> Can<Self>;
 
-    fn tx(self, tx_pin: impl Into<Self::Tx>) -> Can<Self>
-    where
-        NoPin: Into<Self::Rx>;
+    fn tx(self, tx_pin: impl Into<Self::Tx>) -> Can<Self>;
 
-    fn rx(self, rx_pin: impl Into<Self::Rx>) -> Can<Self>
-    where
-        NoPin: Into<Self::Tx>;
+    fn rx(self, rx_pin: impl Into<Self::Rx>) -> Can<Self>;
 }
 
 impl<CAN: Instance> CanExt for CAN {
@@ -53,17 +49,11 @@ impl<CAN: Instance> CanExt for CAN {
         Can::new(self, pins)
     }
 
-    fn tx(self, tx_pin: impl Into<Self::Tx>) -> Can<Self>
-    where
-        NoPin: Into<Self::Rx>,
-    {
+    fn tx(self, tx_pin: impl Into<Self::Tx>) -> Can<Self> {
         Can::tx(self, tx_pin)
     }
 
-    fn rx(self, rx_pin: impl Into<Self::Rx>) -> Can<Self>
-    where
-        NoPin: Into<Self::Tx>,
-    {
+    fn rx(self, rx_pin: impl Into<Self::Rx>) -> Can<Self> {
         Can::rx(self, rx_pin)
     }
 }
@@ -71,42 +61,35 @@ impl<CAN: Instance> CanExt for CAN {
 /// Interface to the CAN peripheral.
 pub struct Can<CAN: Instance> {
     can: CAN,
-    pins: (CAN::Tx, CAN::Rx),
+    pins: (Option<CAN::Tx>, Option<CAN::Rx>),
 }
 
 impl<CAN: Instance> Can<CAN> {
     /// Creates a CAN interface.
     pub fn new(can: CAN, pins: (impl Into<CAN::Tx>, impl Into<CAN::Rx>)) -> Self {
+        Self::_new(can, (Some(pins.0.into()), Some(pins.1.into())))
+    }
+    fn _new(can: CAN, pins: (Option<CAN::Tx>, Option<CAN::Rx>)) -> Self {
         unsafe {
             CAN::enable_unchecked();
             CAN::reset_unchecked();
         }
 
-        let pins = (pins.0.into(), pins.1.into());
-
         Can { can, pins }
     }
 
-    pub fn release(self) -> (CAN, (CAN::Tx, CAN::Rx)) {
+    pub fn release(self) -> (CAN, (Option<CAN::Tx>, Option<CAN::Rx>)) {
         (self.can, self.pins)
     }
 }
 
 impl<CAN: Instance> Can<CAN> {
-    pub fn tx(usart: CAN, tx_pin: impl Into<CAN::Tx>) -> Self
-    where
-        NoPin: Into<CAN::Rx>,
-    {
-        Self::new(usart, (tx_pin, NoPin::new()))
+    pub fn tx(usart: CAN, tx_pin: impl Into<CAN::Tx>) -> Self {
+        Self::_new(usart, (Some(tx_pin.into()), None))
     }
-}
 
-impl<CAN: Instance> Can<CAN> {
-    pub fn rx(usart: CAN, rx_pin: impl Into<CAN::Rx>) -> Self
-    where
-        NoPin: Into<CAN::Tx>,
-    {
-        Self::new(usart, (NoPin::new(), rx_pin))
+    pub fn rx(usart: CAN, rx_pin: impl Into<CAN::Rx>) -> Self {
+        Self::_new(usart, (None, Some(rx_pin.into())))
     }
 }
 
diff --git a/src/gpio.rs b/src/gpio.rs
index 5a8a1e72..09eb961e 100644
--- a/src/gpio.rs
+++ b/src/gpio.rs
@@ -76,16 +76,6 @@ pub use embedded_hal_02::digital::v2::PinState;
 
 use core::fmt;
 
-/// A filler pin type
-#[derive(Debug, Default)]
-#[cfg_attr(feature = "defmt", derive(defmt::Format))]
-pub struct NoPin<Otype = PushPull>(PhantomData<Otype>);
-impl<Otype> NoPin<Otype> {
-    pub fn new() -> Self {
-        Self(PhantomData)
-    }
-}
-
 /// Extension trait to split a GPIO peripheral in independent pins and registers
 pub trait GpioExt {
     /// The parts to split the GPIO into
diff --git a/src/gpio/alt.rs b/src/gpio/alt.rs
index 25b91f92..373e0a79 100644
--- a/src/gpio/alt.rs
+++ b/src/gpio/alt.rs
@@ -65,17 +65,13 @@ macro_rules! extipin {
 use extipin;
 
 macro_rules! pin {
-    ( $($(#[$docs:meta])* <$name:ident, $Otype:ident> for $(no: $NoPin:ident,)? [$(
+    ( $($(#[$docs:meta])* <$name:ident, $Otype:ident> for [$(
         $(#[$attr:meta])* $PX:ident<$A:literal $(, Speed::$Speed:ident)?>,
     )*],)*) => {
         $(
             #[derive(Debug)]
             $(#[$docs])*
             pub enum $name {
-                $(
-                    None($NoPin<$Otype>),
-                )?
-
                 $(
                     $(#[$attr])*
                     $PX(gpio::$PX<$crate::gpio::Alternate<$A, $Otype>>),
@@ -128,14 +124,6 @@ macro_rules! pin {
                 extipin! { $( $(#[$attr])* $PX, )* }
             }
 
-            $(
-                impl From<$NoPin<$Otype>> for $name {
-                    fn from(p: $NoPin<$Otype>) -> Self {
-                        Self::None(p)
-                    }
-                }
-            )?
-
             $(
                 $(#[$attr])*
                 impl<MODE> From<gpio::$PX<MODE>> for $name
@@ -175,17 +163,13 @@ macro_rules! pin {
         )*
     };
 
-    ( $($(#[$docs:meta])* <$name:ident> default:$DefaultOtype:ident for $(no: $NoPin:ident,)? [$(
+    ( $($(#[$docs:meta])* <$name:ident> default:$DefaultOtype:ident for [$(
             $(#[$attr:meta])* $PX:ident<$A:literal>,
     )*],)*) => {
         $(
             #[derive(Debug)]
             $(#[$docs])*
             pub enum $name<Otype = $DefaultOtype> {
-                $(
-                    None($NoPin<Otype>),
-                )?
-
                 $(
                     $(#[$attr])*
                     $PX(gpio::$PX<$crate::gpio::Alternate<$A, Otype>>),
@@ -238,14 +222,6 @@ macro_rules! pin {
                 extipin! { $( $(#[$attr])* $PX, )* }
             }
 
-            $(
-                impl<Otype> From<$NoPin<Otype>> for $name<Otype> {
-                    fn from(p: $NoPin<Otype>) -> Self {
-                        Self::None(p)
-                    }
-                }
-            )?
-
             $(
                 $(#[$attr])*
                 impl<MODE, Otype> From<gpio::$PX<MODE>> for $name<Otype>
diff --git a/src/gpio/alt/f4.rs b/src/gpio/alt/f4.rs
index e631f5a0..4c62c039 100644
--- a/src/gpio/alt/f4.rs
+++ b/src/gpio/alt/f4.rs
@@ -1,12 +1,12 @@
 use super::*;
-use crate::gpio::{self, NoPin, OpenDrain, PushPull};
+use crate::gpio::{self, OpenDrain, PushPull};
 
 #[cfg(feature = "can1")]
 pub mod can1 {
     use super::*;
 
     pin! {
-        <Rx, PushPull> for no:NoPin, [
+        <Rx, PushPull> for [
             PA11<9>,
 
             #[cfg(any(feature = "gpio-f412", feature = "gpio-f413"))]
@@ -29,7 +29,7 @@ pub mod can1 {
             PI9<9>,
         ],
 
-        <Tx, PushPull> for no:NoPin, [
+        <Tx, PushPull> for [
             PA12<9>,
 
             #[cfg(any(feature = "gpio-f412", feature = "gpio-f413"))]
@@ -64,7 +64,7 @@ pub mod can2 {
     use super::*;
 
     pin! {
-        <Rx, PushPull> for no:NoPin, [
+        <Rx, PushPull> for [
             PB5<9>,
 
             PB12<9>,
@@ -73,7 +73,7 @@ pub mod can2 {
             PG11<9>,
         ],
 
-        <Tx, PushPull> for no:NoPin, [
+        <Tx, PushPull> for [
             PB6<9>,
 
             PB13<9>,
@@ -94,13 +94,13 @@ pub mod can3 {
     use super::*;
 
     pin! {
-        <Rx, PushPull> for no:NoPin, [
+        <Rx, PushPull> for [
             PA8<11>,
 
             PB3<11>,
         ],
 
-        <Tx, PushPull> for no:NoPin, [
+        <Tx, PushPull> for [
             PA15<11>,
 
             PB4<11>,
@@ -1553,7 +1553,7 @@ pub mod i2s1 {
             PB3<5>,
         ],
 
-        <Mck, PushPull> for no:NoPin, [
+        <Mck, PushPull> for [
             #[cfg(feature = "gpio-f410")]
             PB10<6>,
 
@@ -1625,7 +1625,7 @@ pub mod i2s2 {
             PI1<5>,
         ],
 
-        <Mck, PushPull> for no:NoPin, [
+        <Mck, PushPull> for [
             #[cfg(any(
                 feature = "gpio-f410",
                 feature = "gpio-f411",
@@ -1765,7 +1765,7 @@ pub mod i2s3 {
             PC10<6>,
         ],
 
-        <Mck, PushPull> for no:NoPin, [
+        <Mck, PushPull> for [
             #[cfg(any(feature = "gpio-f411", feature = "gpio-f412", feature = "gpio-f413"))]
             PB10<6>,
 
@@ -1893,7 +1893,7 @@ pub mod i2s4 {
             PE14<5>,
         ],
 
-        <Mck, PushPull> for no:NoPin, [ ],
+        <Mck, PushPull> for [ ],
 
         <Ws, PushPull> for [
             PB12<6>,
@@ -1943,7 +1943,7 @@ pub mod i2s5 {
             PE14<6>,
         ],
 
-        <Mck, PushPull> for no:NoPin, [ ],
+        <Mck, PushPull> for [ ],
 
         <Ws, PushPull> for [
             PB1<6>,
@@ -2505,7 +2505,7 @@ pub mod sai1 {
             PF9<7>,
         ],
 
-        <MclkA, PushPull> for no:NoPin, [
+        <MclkA, PushPull> for [
             #[cfg(feature = "gpio-f413")]
             PA15<10>,
 
@@ -2519,7 +2519,7 @@ pub mod sai1 {
             PG7<6>,
         ],
 
-        <MclkB, PushPull> for no:NoPin, [
+        <MclkB, PushPull> for [
             #[cfg(feature = "gpio-f446")]
             PC0<6>,
 
@@ -2846,13 +2846,13 @@ pub mod spi1 {
     use super::*;
 
     pin! {
-        <Miso, PushPull> for no:NoPin, [
+        <Miso, PushPull> for [
             PA6<5>,
 
             PB4<5>,
         ],
 
-        <Mosi, PushPull> for no:NoPin, [
+        <Mosi, PushPull> for [
             PA7<5>,
 
             PB5<5>,
@@ -2864,7 +2864,7 @@ pub mod spi1 {
             PA15<5>,
         ],
 
-        <Sck, PushPull> for no:NoPin, [
+        <Sck, PushPull> for [
             PA5<5>,
 
             PB3<5>,
@@ -2883,7 +2883,7 @@ pub mod spi2 {
     use super::*;
 
     pin! {
-        <Miso, PushPull> for no:NoPin, [
+        <Miso, PushPull> for [
             #[cfg(feature = "gpio-f413")]
             PA12<5>,
 
@@ -2895,7 +2895,7 @@ pub mod spi2 {
             PI2<5>,
         ],
 
-        <Mosi, PushPull> for no:NoPin, [
+        <Mosi, PushPull> for [
             #[cfg(feature = "gpio-f413")]
             PA10<5>,
 
@@ -2931,7 +2931,7 @@ pub mod spi2 {
             PI0<5>,
         ],
 
-        <Sck, PushPull> for no:NoPin, [
+        <Sck, PushPull> for [
             #[cfg(any(feature = "gpio-f413", feature = "gpio-f446", feature = "gpio-f469"))]
             PA9<5>,
 
@@ -2977,13 +2977,13 @@ pub mod spi3 {
     use super::*;
 
     pin! {
-        <Miso, PushPull> for no:NoPin, [
+        <Miso, PushPull> for [
             PB4<6>,
 
             PC11<6>,
         ],
 
-        <Mosi, PushPull> for no:NoPin, [
+        <Mosi, PushPull> for [
             #[cfg(feature = "gpio-f446")]
             PB0<7>,
 
@@ -3018,7 +3018,7 @@ pub mod spi3 {
             PA15<6>,
         ],
 
-        <Sck, PushPull> for no:NoPin, [
+        <Sck, PushPull> for [
             PB3<6>,
 
             #[cfg(any(feature = "gpio-f411", feature = "gpio-f412", feature = "gpio-f413"))]
@@ -3041,7 +3041,7 @@ pub mod spi4 {
     use super::*;
 
     pin! {
-        <Miso, PushPull> for no:NoPin, [
+        <Miso, PushPull> for [
             #[cfg(any(feature = "gpio-f411", feature = "gpio-f412", feature = "gpio-f413"))]
             PA11<6>,
 
@@ -3056,7 +3056,7 @@ pub mod spi4 {
             PG12<6>,
         ],
 
-        <Mosi, PushPull> for no:NoPin, [
+        <Mosi, PushPull> for [
             #[cfg(any(feature = "gpio-f411", feature = "gpio-f412", feature = "gpio-f413"))]
             PA1<5>,
 
@@ -3080,7 +3080,7 @@ pub mod spi4 {
             PG14<6>,
         ],
 
-        <Sck, PushPull> for no:NoPin, [
+        <Sck, PushPull> for [
             #[cfg(any(feature = "gpio-f411", feature = "gpio-f412", feature = "gpio-f413"))]
             PB13<6>,
 
@@ -3106,7 +3106,7 @@ pub mod spi5 {
     use super::*;
 
     pin! {
-        <Miso, PushPull> for no:NoPin, [
+        <Miso, PushPull> for [
             #[cfg(any(
                 feature = "gpio-f410",
                 feature = "gpio-f411",
@@ -3128,7 +3128,7 @@ pub mod spi5 {
             PH7<5>,
         ],
 
-        <Mosi, PushPull> for no:NoPin, [
+        <Mosi, PushPull> for [
             #[cfg(any(
                 feature = "gpio-f410",
                 feature = "gpio-f411",
@@ -3180,7 +3180,7 @@ pub mod spi5 {
             PH5<5>,
         ],
 
-        <Sck, PushPull> for no:NoPin, [
+        <Sck, PushPull> for [
             #[cfg(any(
                 feature = "gpio-f410",
                 feature = "gpio-f411",
@@ -3216,11 +3216,11 @@ pub mod spi6 {
     use super::*;
 
     pin! {
-        <Miso, PushPull>  for no:NoPin, [
+        <Miso, PushPull> for [
             PG12<5>,
         ],
 
-        <Mosi, PushPull>  for no:NoPin, [
+        <Mosi, PushPull> for [
             PG14<5>,
         ],
 
@@ -3228,7 +3228,7 @@ pub mod spi6 {
             PG8<5>,
         ],
 
-        <Sck, PushPull>  for no:NoPin, [
+        <Sck, PushPull> for [
             PG13<5>,
         ],
     }
@@ -4013,7 +4013,7 @@ pub mod usart1 {
     }
 
     pin! {
-        <Rx> default: PushPull for no:NoPin, [
+        <Rx> default: PushPull for [
             PA10<7>,
 
             #[cfg(any(
@@ -4027,7 +4027,7 @@ pub mod usart1 {
             PB7<7>,
         ],
 
-        <Tx> default: PushPull for no:NoPin, [
+        <Tx> default: PushPull for [
             PA9<7>,
 
             #[cfg(any(
@@ -4083,14 +4083,14 @@ pub mod usart2 {
     }
 
     pin! {
-        <Rx> default: PushPull for no:NoPin, [
+        <Rx> default: PushPull for [
             PA3<7>,
 
             #[cfg(not(feature = "gpio-f410"))]
             PD6<7>,
         ],
 
-        <Tx> default: PushPull for no:NoPin, [
+        <Tx> default: PushPull for [
             PA2<7>,
 
             #[cfg(not(feature = "gpio-f410"))]
@@ -4157,7 +4157,7 @@ pub mod usart3 {
     }
 
     pin! {
-        <Rx> default: PushPull for no:NoPin, [
+        <Rx> default: PushPull for [
             PB11<7>,
 
             #[cfg(any(feature = "gpio-f412", feature = "gpio-f413", feature = "gpio-f446"))]
@@ -4168,7 +4168,7 @@ pub mod usart3 {
             PD9<7>,
         ],
 
-        <Tx> default: PushPull for no:NoPin, [
+        <Tx> default: PushPull for [
             PB10<7>,
 
             PC10<7>,
@@ -4233,7 +4233,7 @@ pub mod usart6 {
     }
 
     pin! {
-        <Rx> default: PushPull for no:NoPin, [
+        <Rx> default: PushPull for [
             #[cfg(any(
                 feature = "gpio-f401",
                 feature = "gpio-f410",
@@ -4256,7 +4256,7 @@ pub mod usart6 {
             PG9<8>,
         ],
 
-        <Tx> default: PushPull for no:NoPin, [
+        <Tx> default: PushPull for [
             #[cfg(any(
                 feature = "gpio-f401",
                 feature = "gpio-f410",
@@ -4318,7 +4318,7 @@ pub mod uart4 {
     }
 
     pin! {
-        <Rx> default: PushPull for no:NoPin, [
+        <Rx> default: PushPull for [
             PA1<8>,
 
             #[cfg(feature = "gpio-f413")]
@@ -4330,7 +4330,7 @@ pub mod uart4 {
             PD0<11>,
         ],
 
-        <Tx> default: PushPull for no:NoPin, [
+        <Tx> default: PushPull for [
             PA0<8>,
 
             #[cfg(feature = "gpio-f413")]
@@ -4380,7 +4380,7 @@ pub mod uart5 {
     }
 
     pin! {
-        <Rx> default: PushPull for no:NoPin, [
+        <Rx> default: PushPull for [
             #[cfg(feature = "gpio-f413")]
             PB5<11>,
 
@@ -4396,7 +4396,7 @@ pub mod uart5 {
             PE7<8>,
         ],
 
-        <Tx> default: PushPull for no:NoPin, [
+        <Tx> default: PushPull for [
             #[cfg(feature = "gpio-f413")]
             PB6<11>,
 
@@ -4430,7 +4430,7 @@ pub mod uart7 {
     use super::*;
 
     pin! {
-        <Rx> default: PushPull for no:NoPin, [
+        <Rx> default: PushPull for [
             #[cfg(feature = "gpio-f413")]
             PA8<8>,
 
@@ -4442,7 +4442,7 @@ pub mod uart7 {
             PF6<8>,
         ],
 
-        <Tx> default: PushPull for no:NoPin, [
+        <Tx> default: PushPull for [
             #[cfg(feature = "gpio-f413")]
             PA15<8>,
 
@@ -4467,14 +4467,14 @@ pub mod uart8 {
     use super::*;
 
     pin! {
-        <Rx> default: PushPull for no:NoPin, [
+        <Rx> default: PushPull for [
             PE0<8>,
 
             #[cfg(feature = "gpio-f413")]
             PF8<8>,
         ],
 
-        <Tx> default: PushPull for no:NoPin, [
+        <Tx> default: PushPull for [
             PE1<8>,
 
             #[cfg(feature = "gpio-f413")]
@@ -4494,13 +4494,13 @@ pub mod uart9 {
     use super::*;
 
     pin! {
-        <Rx> default: PushPull for no:NoPin, [
+        <Rx> default: PushPull for [
             PD14<11>,
 
             PG0<11>,
         ],
 
-        <Tx> default: PushPull for no:NoPin, [
+        <Tx> default: PushPull for [
             PD15<11>,
 
             PG1<11>,
@@ -4519,13 +4519,13 @@ pub mod uart10 {
     use super::*;
 
     pin! {
-        <Rx> default: PushPull for no:NoPin, [
+        <Rx> default: PushPull for [
             PE2<11>,
 
             PG11<11>,
         ],
 
-        <Tx> default: PushPull for no:NoPin, [
+        <Tx> default: PushPull for [
             PE3<11>,
 
             PG12<11>,
diff --git a/src/i2s.rs b/src/i2s.rs
index 48fde593..47592ab9 100644
--- a/src/i2s.rs
+++ b/src/i2s.rs
@@ -6,7 +6,7 @@
 //! these chips because their `I2S2EXT` and `I2S3EXT` peripherals are missing from their package
 //! access crate.
 
-use crate::gpio::{self, NoPin, PinSpeed, Speed};
+use crate::gpio::{self, PinSpeed, Speed};
 use crate::pac;
 #[allow(unused)]
 use crate::rcc::{self, Clocks, Reset};
@@ -21,9 +21,6 @@ pub extern crate stm32_i2s_v12x;
 // SCK -> CK
 // The master clock output is separate.
 
-/// A placeholder for when the MCLK pin is not needed
-pub type NoMasterClock = NoPin;
-
 /// Trait for SPI peripheral with i2s capability.
 pub trait Instance:
     I2sFreq + rcc::Enable + rcc::Reset + gpio::alt::I2sCommon + gpio::alt::I2sMaster
@@ -87,7 +84,7 @@ pub trait I2sExt: Sized + Instance {
         pins: (
             impl Into<Self::Ws>,
             impl Into<Self::Ck>,
-            impl Into<Self::Mck>,
+            Option<Self::Mck>,
             impl Into<Self::Sd>,
         ),
         clocks: &Clocks,
@@ -100,7 +97,7 @@ impl<SPI: Instance> I2sExt for SPI {
         pins: (
             impl Into<Self::Ws>,
             impl Into<Self::Ck>,
-            impl Into<Self::Mck>,
+            Option<Self::Mck>,
             impl Into<Self::Sd>,
         ),
         clocks: &Clocks,
@@ -117,7 +114,7 @@ pub trait DualI2sExt: Sized + DualInstance {
         pins: (
             impl Into<Self::Ws>,
             impl Into<Self::Ck>,
-            impl Into<Self::Mck>,
+            Option<Self::Mck>,
             impl Into<Self::Sd>,
             impl Into<Self::ExtSd>,
         ),
@@ -132,7 +129,7 @@ impl<SPI: DualInstance> DualI2sExt for SPI {
         pins: (
             impl Into<Self::Ws>,
             impl Into<Self::Ck>,
-            impl Into<Self::Mck>,
+            Option<Self::Mck>,
             impl Into<Self::Sd>,
             impl Into<Self::ExtSd>,
         ),
@@ -145,7 +142,7 @@ impl<SPI: DualInstance> DualI2sExt for SPI {
 /// An I2s wrapper around an SPI object and pins
 pub struct I2s<I: Instance> {
     spi: I,
-    pins: (I::Ws, I::Ck, I::Mck, I::Sd),
+    pins: (I::Ws, I::Ck, Option<I::Mck>, I::Sd),
     /// Frequency of clock input to this peripheral from the I2S PLL or related source
     input_clock: Hertz,
 }
@@ -169,7 +166,7 @@ impl<SPI: Instance> I2s<SPI> {
         pins: (
             impl Into<SPI::Ws>,
             impl Into<SPI::Ck>,
-            impl Into<SPI::Mck>,
+            Option<SPI::Mck>,
             impl Into<SPI::Sd>,
         ),
         clocks: &Clocks,
@@ -185,7 +182,7 @@ impl<SPI: Instance> I2s<SPI> {
             pins.0.into(),
             // Workaround for corrupted last bit of data issue, see stm32f411 errata
             pins.1.into().speed(Speed::VeryHigh),
-            pins.2.into(),
+            pins.2,
             pins.3.into(),
         );
 
@@ -197,7 +194,7 @@ impl<SPI: Instance> I2s<SPI> {
     }
 
     #[allow(clippy::type_complexity)]
-    pub fn release(self) -> (SPI, (SPI::Ws, SPI::Ck, SPI::Mck, SPI::Sd)) {
+    pub fn release(self) -> (SPI, (SPI::Ws, SPI::Ck, Option<SPI::Mck>, SPI::Sd)) {
         (self.spi, self.pins)
     }
 }
@@ -293,7 +290,7 @@ i2s!(pac::SPI5, I2s5, i2s5);
 pub struct DualI2s<I: DualInstance> {
     spi: I,
     i2s_ext: I::I2sExtPeripheral,
-    pins: (I::Ws, I::Ck, I::Mck, I::Sd, I::ExtSd),
+    pins: (I::Ws, I::Ck, Option<I::Mck>, I::Sd, I::ExtSd),
     /// Frequency of clock input to this peripheral from the I2S PLL or related source
     input_clock: Hertz,
 }
@@ -316,7 +313,7 @@ impl<SPI: DualInstance> DualI2s<SPI> {
         pins: (
             impl Into<SPI::Ws>,
             impl Into<SPI::Ck>,
-            impl Into<SPI::Mck>,
+            Option<SPI::Mck>,
             impl Into<SPI::Sd>,
             impl Into<SPI::ExtSd>,
         ),
@@ -334,7 +331,7 @@ impl<SPI: DualInstance> DualI2s<SPI> {
             pins.0.into(),
             // Workaround for corrupted last bit of data issue, see stm32f411 errata
             pins.1.into().speed(Speed::VeryHigh),
-            pins.2.into(),
+            pins.2,
             pins.3.into(),
             pins.4.into(),
         );
@@ -353,7 +350,7 @@ impl<SPI: DualInstance> DualI2s<SPI> {
     ) -> (
         SPI,
         SPI::I2sExtPeripheral,
-        (SPI::Ws, SPI::Ck, SPI::Mck, SPI::Sd, SPI::ExtSd),
+        (SPI::Ws, SPI::Ck, Option<SPI::Mck>, SPI::Sd, SPI::ExtSd),
     ) {
         (self.spi, self.i2s_ext, self.pins)
     }
diff --git a/src/sai.rs b/src/sai.rs
index 7a6bfa21..77df0ee7 100644
--- a/src/sai.rs
+++ b/src/sai.rs
@@ -142,20 +142,20 @@ pub struct Asynchronous;
 pub struct AsyncMaster<Ch: SaiChannel> {
     // TODO: Remove attribute when destroy function is implemented.
     #[allow(unused)]
-    pins: (Ch::Mclk, Ch::Fs, Ch::Sck, Ch::Sd),
+    pins: (Option<Ch::Mclk>, Ch::Fs, Ch::Sck, Ch::Sd),
 }
 
 impl<Ch: SaiChannel> AsyncMaster<Ch> {
     fn new(
         pins: (
-            impl Into<Ch::Mclk>,
+            Option<Ch::Mclk>,
             impl Into<Ch::Fs>,
             impl Into<Ch::Sck>,
             impl Into<Ch::Sd>,
         ),
     ) -> Self {
         Self {
-            pins: (pins.0.into(), pins.1.into(), pins.2.into(), pins.3.into()),
+            pins: (pins.0, pins.1.into(), pins.2.into(), pins.3.into()),
         }
     }
 }
@@ -164,20 +164,20 @@ impl<Ch: SaiChannel> AsyncMaster<Ch> {
 pub struct AsyncSlave<Ch: SaiChannel> {
     // TODO: Remove attribute when destroy function is implemented.
     #[allow(unused)]
-    pins: (Ch::Mclk, Ch::Fs, Ch::Sck, Ch::Sd),
+    pins: (Option<Ch::Mclk>, Ch::Fs, Ch::Sck, Ch::Sd),
 }
 
 impl<Ch: SaiChannel> AsyncSlave<Ch> {
     fn new(
         pins: (
-            impl Into<Ch::Mclk>,
+            Option<Ch::Mclk>,
             impl Into<Ch::Fs>,
             impl Into<Ch::Sck>,
             impl Into<Ch::Sd>,
         ),
     ) -> Self {
         Self {
-            pins: (pins.0.into(), pins.1.into(), pins.2.into(), pins.3.into()),
+            pins: (pins.0, pins.1.into(), pins.2.into(), pins.3.into()),
         }
     }
 }
@@ -622,7 +622,7 @@ where
     pub fn master_rx(
         self,
         pins: (
-            impl Into<Ch::Mclk>,
+            Option<Ch::Mclk>,
             impl Into<Ch::Fs>,
             impl Into<Ch::Sck>,
             impl Into<Ch::Sd>,
@@ -646,7 +646,7 @@ where
     pub fn master_tx(
         self,
         pins: (
-            impl Into<Ch::Mclk>,
+            Option<Ch::Mclk>,
             impl Into<Ch::Fs>,
             impl Into<Ch::Sck>,
             impl Into<Ch::Sd>,
@@ -670,7 +670,7 @@ where
     pub fn slave_rx(
         self,
         pins: (
-            impl Into<Ch::Mclk>,
+            Option<Ch::Mclk>,
             impl Into<Ch::Fs>,
             impl Into<Ch::Sck>,
             impl Into<Ch::Sd>,
@@ -691,7 +691,7 @@ where
     pub fn slave_tx(
         self,
         pins: (
-            impl Into<Ch::Mclk>,
+            Option<Ch::Mclk>,
             impl Into<Ch::Fs>,
             impl Into<Ch::Sck>,
             impl Into<Ch::Sd>,
diff --git a/src/serial.rs b/src/serial.rs
index d4192bb2..6fbe1d86 100644
--- a/src/serial.rs
+++ b/src/serial.rs
@@ -27,7 +27,6 @@ use crate::gpio::{self, PushPull};
 
 use crate::pac;
 
-use crate::gpio::NoPin;
 use crate::rcc::Clocks;
 
 pub mod dma;
@@ -117,11 +116,6 @@ pub mod config;
 
 pub use config::Config;
 
-/// A filler type for when the Tx pin is unnecessary
-pub use gpio::NoPin as NoTx;
-/// A filler type for when the Rx pin is unnecessary
-pub use gpio::NoPin as NoRx;
-
 pub use gpio::alt::SerialAsync as CommonPins;
 
 /// Trait for [`Rx`] interrupt handling.
@@ -185,14 +179,14 @@ pub struct Serial<USART: CommonPins, WORD = u8> {
 pub struct Rx<USART: CommonPins, WORD = u8> {
     _word: PhantomData<WORD>,
     usart: USART,
-    pin: USART::Rx<PushPull>,
+    pin: Option<USART::Rx<PushPull>>,
 }
 
 /// Serial transmitter containing TX pin
 pub struct Tx<USART: CommonPins, WORD = u8> {
     _word: PhantomData<WORD>,
     usart: USART,
-    pin: USART::Tx<PushPull>,
+    pin: Option<USART::Tx<PushPull>>,
 }
 
 pub trait SerialExt: Sized + Instance {
@@ -208,26 +202,14 @@ pub trait SerialExt: Sized + Instance {
         tx_pin: impl Into<Self::Tx<PushPull>>,
         config: impl Into<config::Config>,
         clocks: &Clocks,
-    ) -> Result<Tx<Self, WORD>, config::InvalidConfig>
-    where
-        NoPin: Into<Self::Rx<PushPull>>,
-    {
-        self.serial((tx_pin, NoPin::new()), config, clocks)
-            .map(|s| s.split().0)
-    }
+    ) -> Result<Tx<Self, WORD>, config::InvalidConfig>;
 
     fn rx<WORD>(
         self,
         rx_pin: impl Into<Self::Rx<PushPull>>,
         config: impl Into<config::Config>,
         clocks: &Clocks,
-    ) -> Result<Rx<Self, WORD>, config::InvalidConfig>
-    where
-        NoPin: Into<Self::Tx<PushPull>>,
-    {
-        self.serial((NoPin::new(), rx_pin), config, clocks)
-            .map(|s| s.split().1)
-    }
+    ) -> Result<Rx<Self, WORD>, config::InvalidConfig>;
 }
 
 impl<USART: Instance, WORD> Serial<USART, WORD> {
@@ -240,7 +222,12 @@ impl<USART: Instance, WORD> Serial<USART, WORD> {
         config: impl Into<config::Config>,
         clocks: &Clocks,
     ) -> Result<Self, config::InvalidConfig> {
-        <USART as crate::Ptr>::RB::new(usart, pins, config, clocks)
+        <USART as crate::Ptr>::RB::new(
+            usart,
+            (Some(pins.0.into()), Some(pins.1.into())),
+            config,
+            clocks,
+        )
     }
 }
 
@@ -250,7 +237,12 @@ impl<UART: CommonPins, WORD> Serial<UART, WORD> {
     }
 
     #[allow(clippy::type_complexity)]
-    pub fn release(self) -> (UART, (UART::Tx<PushPull>, UART::Rx<PushPull>)) {
+    pub fn release(
+        self,
+    ) -> (
+        UART,
+        (Option<UART::Tx<PushPull>>, Option<UART::Rx<PushPull>>),
+    ) {
         (self.tx.usart, (self.tx.pin, self.rx.pin))
     }
 }
@@ -326,7 +318,7 @@ impl<UART: CommonPins> Tx<UART, u16> {
 }
 
 impl<UART: CommonPins, WORD> Rx<UART, WORD> {
-    pub(crate) fn new(usart: UART, pin: UART::Rx<PushPull>) -> Self {
+    pub(crate) fn new(usart: UART, pin: Option<UART::Rx<PushPull>>) -> Self {
         Self {
             _word: PhantomData,
             usart,
@@ -340,7 +332,7 @@ impl<UART: CommonPins, WORD> Rx<UART, WORD> {
 }
 
 impl<UART: CommonPins, WORD> Tx<UART, WORD> {
-    pub(crate) fn new(usart: UART, pin: UART::Tx<PushPull>) -> Self {
+    pub(crate) fn new(usart: UART, pin: Option<UART::Tx<PushPull>>) -> Self {
         Self {
             _word: PhantomData,
             usart,
diff --git a/src/serial/uart_impls.rs b/src/serial/uart_impls.rs
index 7a5c7bb9..caf7dcd2 100644
--- a/src/serial/uart_impls.rs
+++ b/src/serial/uart_impls.rs
@@ -10,7 +10,7 @@ use crate::dma::{
     traits::{DMASet, PeriAddress},
     MemoryToPeripheral, PeripheralToMemory,
 };
-use crate::gpio::{alt::SerialAsync as CommonPins, NoPin, PushPull};
+use crate::gpio::{alt::SerialAsync as CommonPins, PushPull};
 use crate::rcc::{self, Clocks};
 
 #[cfg(feature = "uart4")]
@@ -45,7 +45,7 @@ pub trait RegisterBlockImpl: crate::Sealed {
     #[allow(clippy::new_ret_no_self)]
     fn new<UART: Instance + crate::Ptr<RB = Self>, WORD>(
         uart: UART,
-        pins: (impl Into<UART::Tx<PushPull>>, impl Into<UART::Rx<PushPull>>),
+        pins: (Option<UART::Tx<PushPull>>, Option<UART::Rx<PushPull>>),
         config: impl Into<config::Config>,
         clocks: &Clocks,
     ) -> Result<Serial<UART, WORD>, config::InvalidConfig>;
@@ -330,7 +330,7 @@ macro_rules! uartCommon {
 impl RegisterBlockImpl for RegisterBlockUsart {
     fn new<UART: Instance + crate::Ptr<RB = Self>, WORD>(
         uart: UART,
-        pins: (impl Into<UART::Tx<PushPull>>, impl Into<UART::Rx<PushPull>>),
+        pins: (Option<UART::Tx<PushPull>>, Option<UART::Rx<PushPull>>),
         config: impl Into<config::Config>,
         clocks: &Clocks,
     ) -> Result<Serial<UART, WORD>, config::InvalidConfig>
@@ -397,8 +397,8 @@ where {
         uart.enable_dma(config.dma);
 
         let serial = Serial {
-            tx: Tx::new(uart, pins.0.into()),
-            rx: Rx::new(unsafe { UART::steal() }, pins.1.into()),
+            tx: Tx::new(uart, pins.0),
+            rx: Rx::new(unsafe { UART::steal() }, pins.1),
         };
         serial.tx.usart.set_stopbits(config.stopbits);
         Ok(serial)
@@ -411,7 +411,7 @@ where {
 impl RegisterBlockImpl for RegisterBlockUart {
     fn new<UART: Instance + crate::Ptr<RB = Self>, WORD>(
         uart: UART,
-        pins: (impl Into<UART::Tx<PushPull>>, impl Into<UART::Rx<PushPull>>),
+        pins: (Option<UART::Tx<PushPull>>, Option<UART::Rx<PushPull>>),
         config: impl Into<config::Config>,
         clocks: &Clocks,
     ) -> Result<Serial<UART, WORD>, config::InvalidConfig>
@@ -452,8 +452,8 @@ where {
         uart.enable_dma(config.dma);
 
         let serial = Serial {
-            tx: Tx::new(uart, pins.0.into()),
-            rx: Rx::new(unsafe { UART::steal() }, pins.1.into()),
+            tx: Tx::new(uart, pins.0),
+            rx: Rx::new(unsafe { UART::steal() }, pins.1),
         };
         serial.tx.usart.set_stopbits(config.stopbits);
         Ok(serial)
@@ -603,6 +603,26 @@ impl<UART: Instance> SerialExt for UART {
     ) -> Result<Serial<Self, WORD>, config::InvalidConfig> {
         Serial::new(self, pins, config, clocks)
     }
+
+    fn tx<WORD>(
+        self,
+        tx_pin: impl Into<Self::Tx<PushPull>>,
+        config: impl Into<config::Config>,
+        clocks: &Clocks,
+    ) -> Result<Tx<Self, WORD>, config::InvalidConfig> {
+        <UART as crate::Ptr>::RB::new(self, (Some(tx_pin.into()), None), config, clocks)
+            .map(|s| s.split().0)
+    }
+
+    fn rx<WORD>(
+        self,
+        rx_pin: impl Into<Self::Rx<PushPull>>,
+        config: impl Into<config::Config>,
+        clocks: &Clocks,
+    ) -> Result<Rx<Self, WORD>, config::InvalidConfig> {
+        <UART as crate::Ptr>::RB::new(self, (None, Some(rx_pin.into())), config, clocks)
+            .map(|s| s.split().1)
+    }
 }
 
 impl<UART: Instance, WORD> Serial<UART, WORD> {
@@ -611,11 +631,9 @@ impl<UART: Instance, WORD> Serial<UART, WORD> {
         tx_pin: impl Into<UART::Tx<PushPull>>,
         config: impl Into<config::Config>,
         clocks: &Clocks,
-    ) -> Result<Tx<UART, WORD>, config::InvalidConfig>
-    where
-        NoPin: Into<UART::Rx<PushPull>>,
-    {
-        Self::new(usart, (tx_pin, NoPin::new()), config, clocks).map(|s| s.split().0)
+    ) -> Result<Tx<UART, WORD>, config::InvalidConfig> {
+        <UART as crate::Ptr>::RB::new(usart, (Some(tx_pin.into()), None), config, clocks)
+            .map(|s| s.split().0)
     }
 }
 
@@ -625,11 +643,9 @@ impl<UART: Instance, WORD> Serial<UART, WORD> {
         rx_pin: impl Into<UART::Rx<PushPull>>,
         config: impl Into<config::Config>,
         clocks: &Clocks,
-    ) -> Result<Rx<UART, WORD>, config::InvalidConfig>
-    where
-        NoPin: Into<UART::Tx<PushPull>>,
-    {
-        Self::new(usart, (NoPin::new(), rx_pin), config, clocks).map(|s| s.split().1)
+    ) -> Result<Rx<UART, WORD>, config::InvalidConfig> {
+        <UART as crate::Ptr>::RB::new(usart, (None, Some(rx_pin.into())), config, clocks)
+            .map(|s| s.split().1)
     }
 }
 
diff --git a/src/spi.rs b/src/spi.rs
index 115af85a..ce74b49f 100644
--- a/src/spi.rs
+++ b/src/spi.rs
@@ -3,7 +3,7 @@ use core::ops::{Deref, DerefMut};
 
 use crate::dma::traits::{DMASet, PeriAddress};
 use crate::dma::{MemoryToPeripheral, PeripheralToMemory};
-use crate::gpio::{self, NoPin};
+use crate::gpio;
 use crate::pac;
 
 /// Clock polarity
@@ -56,13 +56,6 @@ pub enum Error {
     Crc,
 }
 
-/// A filler type for when the SCK pin is unnecessary
-pub type NoSck = NoPin;
-/// A filler type for when the Miso pin is unnecessary
-pub type NoMiso = NoPin;
-/// A filler type for when the Mosi pin is unnecessary
-pub type NoMosi = NoPin;
-
 /// SPI interrupt events
 #[enumflags2::bitflags]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
@@ -171,7 +164,7 @@ pub struct Inner<SPI: Instance> {
 #[derive(Debug)]
 pub struct Spi<SPI: Instance, const BIDI: bool = false, W = u8> {
     inner: Inner<SPI>,
-    pins: (SPI::Sck, SPI::Miso, SPI::Mosi),
+    pins: (Option<SPI::Sck>, Option<SPI::Miso>, Option<SPI::Mosi>),
     _operation: PhantomData<W>,
 }
 
@@ -192,7 +185,12 @@ impl<SPI: Instance, const BIDI: bool, W> DerefMut for Spi<SPI, BIDI, W> {
 #[derive(Debug)]
 pub struct SpiSlave<SPI: Instance, const BIDI: bool = false, W = u8> {
     inner: Inner<SPI>,
-    pins: (SPI::Sck, SPI::Miso, SPI::Mosi, Option<SPI::Nss>),
+    pins: (
+        Option<SPI::Sck>,
+        Option<SPI::Miso>,
+        Option<SPI::Mosi>,
+        Option<SPI::Nss>,
+    ),
     _operation: PhantomData<W>,
 }
 
@@ -256,11 +254,7 @@ spi! { pac::SPI6: Spi6, SpiSlave6 }
 pub trait SpiExt: Sized + Instance {
     fn spi(
         self,
-        pins: (
-            impl Into<Self::Sck>,
-            impl Into<Self::Miso>,
-            impl Into<Self::Mosi>,
-        ),
+        pins: (Option<Self::Sck>, Option<Self::Miso>, Option<Self::Mosi>),
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
@@ -268,20 +262,18 @@ pub trait SpiExt: Sized + Instance {
 
     fn spi_bidi(
         self,
-        pins: (impl Into<Self::Sck>, impl Into<Self::Mosi>),
+        pins: (Option<Self::Sck>, Option<Self::Mosi>),
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, true, u8>
-    where
-        NoPin: Into<Self::Miso>;
+    ) -> Spi<Self, true, u8>;
 
     fn spi_slave(
         self,
         pins: (
-            impl Into<Self::Sck>,
-            impl Into<Self::Miso>,
-            impl Into<Self::Mosi>,
+            Option<Self::Sck>,
+            Option<Self::Miso>,
+            Option<Self::Mosi>,
             Option<Self::Nss>,
         ),
         mode: impl Into<Mode>,
@@ -289,15 +281,9 @@ pub trait SpiExt: Sized + Instance {
 
     fn spi_bidi_slave(
         self,
-        pins: (
-            impl Into<Self::Sck>,
-            impl Into<Self::Miso>,
-            Option<Self::Nss>,
-        ),
+        pins: (Option<Self::Sck>, Option<Self::Miso>, Option<Self::Nss>),
         mode: impl Into<Mode>,
-    ) -> SpiSlave<Self, true, u8>
-    where
-        NoPin: Into<Self::Mosi>;
+    ) -> SpiSlave<Self, true, u8>;
 }
 
 impl<SPI: Instance> SpiExt for SPI {
@@ -308,11 +294,7 @@ impl<SPI: Instance> SpiExt for SPI {
     /// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
     fn spi(
         self,
-        pins: (
-            impl Into<Self::Sck>,
-            impl Into<Self::Miso>,
-            impl Into<Self::Mosi>,
-        ),
+        pins: (Option<Self::Sck>, Option<Self::Miso>, Option<Self::Mosi>),
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
@@ -326,14 +308,11 @@ impl<SPI: Instance> SpiExt for SPI {
     /// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
     fn spi_bidi(
         self,
-        pins: (impl Into<Self::Sck>, impl Into<Self::Mosi>),
+        pins: (Option<Self::Sck>, Option<Self::Mosi>),
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, true, u8>
-    where
-        NoPin: Into<Self::Miso>,
-    {
+    ) -> Spi<Self, true, u8> {
         Spi::new_bidi(self, pins, mode, freq, clocks)
     }
     /// Enables the SPI clock, resets the peripheral, sets `Alternate` mode for `pins` and initialize the peripheral as SPI Slave Normal mode.
@@ -344,9 +323,9 @@ impl<SPI: Instance> SpiExt for SPI {
     fn spi_slave(
         self,
         pins: (
-            impl Into<Self::Sck>,
-            impl Into<Self::Miso>,
-            impl Into<Self::Mosi>,
+            Option<Self::Sck>,
+            Option<Self::Miso>,
+            Option<Self::Mosi>,
             Option<Self::Nss>,
         ),
         mode: impl Into<Mode>,
@@ -360,16 +339,9 @@ impl<SPI: Instance> SpiExt for SPI {
     /// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
     fn spi_bidi_slave(
         self,
-        pins: (
-            impl Into<Self::Sck>,
-            impl Into<Self::Miso>,
-            Option<Self::Nss>,
-        ),
+        pins: (Option<Self::Sck>, Option<Self::Miso>, Option<Self::Nss>),
         mode: impl Into<Mode>,
-    ) -> SpiSlave<Self, true, u8>
-    where
-        NoPin: Into<Self::Mosi>,
-    {
+    ) -> SpiSlave<Self, true, u8> {
         SpiSlave::new_bidi(self, pins, mode)
     }
 }
@@ -478,11 +450,7 @@ impl<SPI: Instance> Spi<SPI, false, u8> {
     /// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
     pub fn new(
         spi: SPI,
-        pins: (
-            impl Into<SPI::Sck>,
-            impl Into<SPI::Miso>,
-            impl Into<SPI::Mosi>,
-        ),
+        pins: (Option<SPI::Sck>, Option<SPI::Miso>, Option<SPI::Mosi>),
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
@@ -492,7 +460,7 @@ impl<SPI: Instance> Spi<SPI, false, u8> {
             SPI::reset_unchecked();
         }
 
-        let pins = (pins.0.into(), pins.1.into(), pins.2.into());
+        let pins = (pins.0, pins.1, pins.2);
 
         Self::_new(spi, pins)
             .pre_init(mode.into(), freq, SPI::clock(clocks))
@@ -508,20 +476,17 @@ impl<SPI: Instance> Spi<SPI, true, u8> {
     /// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
     pub fn new_bidi(
         spi: SPI,
-        pins: (impl Into<SPI::Sck>, impl Into<SPI::Mosi>),
+        pins: (Option<SPI::Sck>, Option<SPI::Mosi>),
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Self
-    where
-        NoPin: Into<SPI::Miso>,
-    {
+    ) -> Self {
         unsafe {
             SPI::enable_unchecked();
             SPI::reset_unchecked();
         }
 
-        let pins = (pins.0.into(), NoPin::new().into(), pins.1.into());
+        let pins = (pins.0, None, pins.1);
 
         Self::_new(spi, pins)
             .pre_init(mode.into(), freq, SPI::clock(clocks))
@@ -538,9 +503,9 @@ impl<SPI: Instance> SpiSlave<SPI, false, u8> {
     pub fn new(
         spi: SPI,
         pins: (
-            impl Into<SPI::Sck>,
-            impl Into<SPI::Miso>,
-            impl Into<SPI::Mosi>,
+            Option<SPI::Sck>,
+            Option<SPI::Miso>,
+            Option<SPI::Mosi>,
             Option<SPI::Nss>,
         ),
         mode: impl Into<Mode>,
@@ -550,7 +515,7 @@ impl<SPI: Instance> SpiSlave<SPI, false, u8> {
             SPI::reset_unchecked();
         }
 
-        let pins = (pins.0.into(), pins.1.into(), pins.2.into(), pins.3);
+        let pins = (pins.0, pins.1, pins.2, pins.3);
 
         Self::_new(spi, pins).pre_init(mode.into()).init()
     }
@@ -564,18 +529,15 @@ impl<SPI: Instance> SpiSlave<SPI, true, u8> {
     /// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
     pub fn new_bidi(
         spi: SPI,
-        pins: (impl Into<SPI::Sck>, impl Into<SPI::Miso>, Option<SPI::Nss>),
+        pins: (Option<SPI::Sck>, Option<SPI::Miso>, Option<SPI::Nss>),
         mode: impl Into<Mode>,
-    ) -> Self
-    where
-        NoPin: Into<SPI::Mosi>,
-    {
+    ) -> Self {
         unsafe {
             SPI::enable_unchecked();
             SPI::reset_unchecked();
         }
 
-        let pins = (pins.0.into(), pins.1.into(), NoPin::new().into(), pins.2);
+        let pins = (pins.0, pins.1, None, pins.2);
 
         Self::_new(spi, pins).pre_init(mode.into()).init()
     }
@@ -583,20 +545,35 @@ impl<SPI: Instance> SpiSlave<SPI, true, u8> {
 
 impl<SPI: Instance, const BIDI: bool, W> Spi<SPI, BIDI, W> {
     #[allow(clippy::type_complexity)]
-    pub fn release(self) -> (SPI, (SPI::Sck, SPI::Miso, SPI::Mosi)) {
+    pub fn release(
+        self,
+    ) -> (
+        SPI,
+        (Option<SPI::Sck>, Option<SPI::Miso>, Option<SPI::Mosi>),
+    ) {
         (self.inner.spi, self.pins)
     }
 }
 
 impl<SPI: Instance, const BIDI: bool, W> SpiSlave<SPI, BIDI, W> {
     #[allow(clippy::type_complexity)]
-    pub fn release(self) -> (SPI, (SPI::Sck, SPI::Miso, SPI::Mosi, Option<SPI::Nss>)) {
+    pub fn release(
+        self,
+    ) -> (
+        SPI,
+        (
+            Option<SPI::Sck>,
+            Option<SPI::Miso>,
+            Option<SPI::Mosi>,
+            Option<SPI::Nss>,
+        ),
+    ) {
         (self.inner.spi, self.pins)
     }
 }
 
 impl<SPI: Instance, const BIDI: bool, W> Spi<SPI, BIDI, W> {
-    fn _new(spi: SPI, pins: (SPI::Sck, SPI::Miso, SPI::Mosi)) -> Self {
+    fn _new(spi: SPI, pins: (Option<SPI::Sck>, Option<SPI::Miso>, Option<SPI::Mosi>)) -> Self {
         Self {
             inner: Inner::new(spi),
             pins,
@@ -613,7 +590,15 @@ impl<SPI: Instance, const BIDI: bool, W> Spi<SPI, BIDI, W> {
 }
 
 impl<SPI: Instance, const BIDI: bool, W> SpiSlave<SPI, BIDI, W> {
-    fn _new(spi: SPI, pins: (SPI::Sck, SPI::Miso, SPI::Mosi, Option<SPI::Nss>)) -> Self {
+    fn _new(
+        spi: SPI,
+        pins: (
+            Option<SPI::Sck>,
+            Option<SPI::Miso>,
+            Option<SPI::Mosi>,
+            Option<SPI::Nss>,
+        ),
+    ) -> Self {
         Self {
             inner: Inner::new(spi),
             pins,
diff --git a/src/uart.rs b/src/uart.rs
index d33e2e7b..1b9a881b 100644
--- a/src/uart.rs
+++ b/src/uart.rs
@@ -18,7 +18,7 @@ use crate::pac;
 
 use crate::serial::uart_impls::RegisterBlockUart;
 
-pub use crate::serial::{config, Error, Event, Instance, NoRx, NoTx, Rx, RxISR, Serial, Tx, TxISR};
+pub use crate::serial::{config, Error, Event, Instance, Rx, RxISR, Serial, Tx, TxISR};
 pub use config::Config;
 
 macro_rules! halUart {