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Use LL libraries for C071R(8-B)T clock config
Also add support for Generic C071R8Tx
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3 files changed

+33
-25
lines changed

3 files changed

+33
-25
lines changed

Diff for: README.md

+1-1
Original file line numberDiff line numberDiff line change
@@ -214,7 +214,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | STM32C011J4<br>STM32C011J6 | Generic Board | *2.8.0* | |
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| :green_heart: | STM32C031C4<br>STM32C031C6 | Generic Board | *2.5.0* | |
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| :green_heart: | STM32C031F4<br>STM32C031F6 | Generic Board | *2.6.0* | |
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| :green_heart: | STM32G071RB | Generic Board | *2.9.0* | |
217+
| :yellow_heart: | STM32C071R8<br>STM32C071RB | Generic Board | **2.9.0** | |
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### Generic STM32F0 boards
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Diff for: boards.txt

+8
Original file line numberDiff line numberDiff line change
@@ -1668,6 +1668,14 @@ GenC0.menu.pnum.GENERIC_C031F6PX.build.product_line=STM32C031xx
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GenC0.menu.pnum.GENERIC_C031F6PX.build.variant=STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P
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GenC0.menu.pnum.GENERIC_C031F6PX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd
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1671+
# Generic C071R8Tx
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GenC0.menu.pnum.GENERIC_C071R8TX=Generic C071R8Tx
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GenC0.menu.pnum.GENERIC_C071R8TX.upload.maximum_size=65536
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GenC0.menu.pnum.GENERIC_C071R8TX.upload.maximum_data_size=24576
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GenC0.menu.pnum.GENERIC_C071R8TX.build.board=GENERIC_C071R8TX
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GenC0.menu.pnum.GENERIC_C071R8TX.build.product_line=STM32C071xx
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GenC0.menu.pnum.GENERIC_C071R8TX.build.variant=STM32C0xx/C071R(8-B)T
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# Generic C071RBTx
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GenC0.menu.pnum.GENERIC_C071RBTX=Generic C071RBTx
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GenC0.menu.pnum.GENERIC_C071RBTX.upload.maximum_size=131072

Diff for: variants/STM32C0xx/C071R(8-B)T/generic_clock.c

+24-24
Original file line numberDiff line numberDiff line change
@@ -14,38 +14,38 @@
1414
#include "pins_arduino.h"
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1616
/**
17-
* @brief System Clock Configuration
18-
* @param None
19-
* @retval None
20-
*/
17+
* @brief System Clock Configuration
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* @param None
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* @retval None
20+
*/
2121
WEAK void SystemClock_Config(void)
2222
{
23-
RCC_OscInitTypeDef RCC_OscInitStruct = {};
24-
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
23+
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
2524

26-
/** Initializes the RCC Oscillators according to the specified parameters
27-
* in the RCC_OscInitTypeDef structure.
28-
*/
29-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
30-
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
31-
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
32-
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
33-
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
25+
/* HSI configuration and activation */
26+
LL_RCC_HSI_Enable();
27+
while (LL_RCC_HSI_IsReady() != 1)
28+
{
29+
}
3430

35-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
31+
LL_RCC_HSI_SetCalibTrimming(64);
32+
LL_RCC_SetHSIDiv(LL_RCC_HSI_DIV_1);
33+
/* Set AHB prescaler*/
34+
LL_RCC_SetAHBPrescaler(LL_RCC_HCLK_DIV_1);
35+
36+
/* Sysclk activation on the HSI */
37+
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
38+
while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI)
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{
37-
Error_Handler();
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}
3941

40-
/** Initializes the CPU, AHB and APB buses clocks
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*/
42-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
44-
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
45-
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
46-
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
42+
/* Set APB1 prescaler*/
43+
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
44+
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
45+
LL_SetSystemCoreClock(48000000);
4746

48-
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
47+
/* Update the time base */
48+
if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
4949
{
5050
Error_Handler();
5151
}

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