From d54ff18677a9955f0afed146138d03afacf2b12a Mon Sep 17 00:00:00 2001 From: MCUdude Date: Wed, 27 Nov 2019 12:36:44 +0100 Subject: [PATCH 1/2] Add generic F401Rx variant This pinout style matches the physical pin style of the F401Rx family pretty well. It makes it easier when working with purposely designed hardware that is not based around a development board. This variant will first try to drive an external crystal. If not present, the MCU will automatically switch to its internal (but less accurate) oscillator instead. Resolves #784 --- boards.txt | 36 ++++ variants/Generic_F401Rx/PeripheralPins.c | 246 +++++++++++++++++++++++ variants/Generic_F401Rx/PinNamesVar.h | 33 +++ variants/Generic_F401Rx/ldscript.ld | 186 +++++++++++++++++ variants/Generic_F401Rx/variant.cpp | 218 ++++++++++++++++++++ variants/Generic_F401Rx/variant.h | 149 ++++++++++++++ 6 files changed, 868 insertions(+) create mode 100644 variants/Generic_F401Rx/PeripheralPins.c create mode 100644 variants/Generic_F401Rx/PinNamesVar.h create mode 100644 variants/Generic_F401Rx/ldscript.ld create mode 100644 variants/Generic_F401Rx/variant.cpp create mode 100644 variants/Generic_F401Rx/variant.h diff --git a/boards.txt b/boards.txt index 6a9f6288e6..d322ee87cb 100644 --- a/boards.txt +++ b/boards.txt @@ -1025,6 +1025,42 @@ GenF4.menu.pnum.FEATHER_F405.build.board=FEATHER_F405 GenF4.menu.pnum.FEATHER_F405.build.product_line=STM32F405xx GenF4.menu.pnum.FEATHER_F405.build.variant=FEATHER_F405 +# Generic F401RE +GenF4.menu.pnum.Generic_F401RE=Generic F401RE +GenF4.menu.pnum.Generic_F401RE.upload.maximum_size=524288 +GenF4.menu.pnum.Generic_F401RE.upload.maximum_data_size=98304 +GenF4.menu.pnum.Generic_F401RE.build.board=GENERIC_F401RE +GenF4.menu.pnum.Generic_F401RE.build.product_line=STM32F401xE +GenF4.menu.pnum.Generic_F401RE.build.variant=Generic_F401Rx +GenF4.menu.pnum.Generic_F401RE.node=NODE_F401RE + +# Generic F401RD +GenF4.menu.pnum.Generic_F401RD=Generic F401RD +GenF4.menu.pnum.Generic_F401RD.upload.maximum_size=393216 +GenF4.menu.pnum.Generic_F401RD.upload.maximum_data_size=98304 +GenF4.menu.pnum.Generic_F401RD.build.board=GENERIC_F401RD +GenF4.menu.pnum.Generic_F401RD.build.product_line=STM32F401xE +GenF4.menu.pnum.Generic_F401RD.build.variant=Generic_F401Rx +GenF4.menu.pnum.Generic_F401RD.node=NODE_F401RE + +# Generic F401RC +GenF4.menu.pnum.Generic_F401RC=Generic F401RC +GenF4.menu.pnum.Generic_F401RC.upload.maximum_size=262144 +GenF4.menu.pnum.Generic_F401RC.upload.maximum_data_size=65536 +GenF4.menu.pnum.Generic_F401RC.build.board=GENERIC_F401RC +GenF4.menu.pnum.Generic_F401RC.build.product_line=STM32F401xC +GenF4.menu.pnum.Generic_F401RC.build.variant=Generic_F401Rx +GenF4.menu.pnum.Generic_F401RC.node=NODE_F401RE + +# Generic F401RB +GenF4.menu.pnum.Generic_F401RB=Generic F401RB +GenF4.menu.pnum.Generic_F401RB.upload.maximum_size=131072 +GenF4.menu.pnum.Generic_F401RB.upload.maximum_data_size=65536 +GenF4.menu.pnum.Generic_F401RB.build.board=GENERIC_F401RB +GenF4.menu.pnum.Generic_F401RB.build.product_line=STM32F401xC +GenF4.menu.pnum.Generic_F401RB.build.variant=Generic_F401Rx +GenF4.menu.pnum.Generic_F401RB.node=NODE_F401RE + # Upload menu GenF4.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD) GenF4.menu.upload_method.swdMethod.upload.protocol=0 diff --git a/variants/Generic_F401Rx/PeripheralPins.c b/variants/Generic_F401Rx/PeripheralPins.c new file mode 100644 index 0000000000..af34dd314a --- /dev/null +++ b/variants/Generic_F401Rx/PeripheralPins.c @@ -0,0 +1,246 @@ +/* + ******************************************************************************* + * Copyright (c) 2019, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32F401R(D-E)Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {NC, NP, 0} +}; +#endif + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PB_3, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_PWM[] = { + // {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // A0 // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // A0 // TIM5_CH1 + // {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // A1 // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // A1 // TIM5_CH2 + // {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // D1 // TIM2_CH3 - ST-Link + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // D1 // TIM5_CH3 - ST-Link + // {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // D1 // TIM9_CH1 - ST-Link + // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // D0 // TIM2_CH4 - ST-Link + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // D0 // TIM5_CH4 - ST-Link + // {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // D0 // TIM9_CH2 - ST-Link + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // D13 // TIM2_CH1 - SPI + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // D12 // TIM3_CH1 - SPI + // {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // D11 // TIM1_CH1N - SPI + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // D11 // TIM3_CH2 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // D7 // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // D8 // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // D2 // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // D37 // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // D21 // TIM2_CH1 + // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // A3 // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // A3 // TIM3_CH3 + // {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // D41 // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // D41 // TIM3_CH4 + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // D3 // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // D5 // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // D4 // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // D10 // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // D22 // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // D15 // TIM4_CH3 - SCL + // {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // D15 // TIM10_CH1 - SCL + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // D14 // TIM4_CH4 - SDA + // {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // D14 // TIM11_CH1 - SDA + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // D6 // TIM2_CH3 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // D44 // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // D43 // TIM1_CH2N + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // D42 // TIM1_CH3N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // D34 // TIM3_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // D9 // TIM3_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // D33 // TIM3_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // D32 // TIM3_CH4 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_11, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** No CAN *** + +//*** No ETHERNET *** + +//*** No QUADSPI *** + +//*** USB *** + +#ifdef HAL_PCD_MODULE_ENABLED +WEAK const PinMap PinMap_USB_OTG_FS[] = { + {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NP, 0} +}; +#endif + +//*** No USB_OTG_HS *** \ No newline at end of file diff --git a/variants/Generic_F401Rx/PinNamesVar.h b/variants/Generic_F401Rx/PinNamesVar.h new file mode 100644 index 0000000000..e90a617cc5 --- /dev/null +++ b/variants/Generic_F401Rx/PinNamesVar.h @@ -0,0 +1,33 @@ +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 +SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 +SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 +SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 +SYS_WKUP4 = NC, +#endif +#ifdef PWR_WAKEUP_PIN5 +SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 +SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 +SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 +SYS_WKUP8 = NC, +#endif +/* USB */ +#ifdef USBCON +USB_OTG_FS_SOF = PA_8, +USB_OTG_FS_VBUS = PA_9, +USB_OTG_FS_ID = PA_10, +USB_OTG_FS_DM = PA_11, +USB_OTG_FS_DP = PA_12, +#endif \ No newline at end of file diff --git a/variants/Generic_F401Rx/ldscript.ld b/variants/Generic_F401Rx/ldscript.ld new file mode 100644 index 0000000000..fdf4a1fc4c --- /dev/null +++ b/variants/Generic_F401Rx/ldscript.ld @@ -0,0 +1,186 @@ +/* +***************************************************************************** +** + +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32F401RETx Device with +** 512KByte FLASH, 96KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2014 Ac6

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of Ac6 nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200;; /* required amount of heap */ +_Min_Stack_Size = 0x400;; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text ALIGN(4): + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} \ No newline at end of file diff --git a/variants/Generic_F401Rx/variant.cpp b/variants/Generic_F401Rx/variant.cpp new file mode 100644 index 0000000000..8c12839d1d --- /dev/null +++ b/variants/Generic_F401Rx/variant.cpp @@ -0,0 +1,218 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include "pins_arduino.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// Pin number +const PinName digitalPin[] = { + PA_0, // Digital pin 0 + PA_1, // Digital pin 1 + PA_2, // Digital pin 2 + PA_3, // Digital pin 3 + PA_4, // Digital pin 4 + PA_5, // Digital pin 5 + PA_6, // Digital pin 6 + PA_7, // Digital pin 7 + PA_8, // Digital pin 8 + PA_9, // Digital pin 9 + PA_10, // Digital pin 10 + PA_11, // Digital pin 11 + PA_12, // Digital pin 12 + PA_13, // Digital pin 13 + PA_14, // Digital pin 14 + PA_15, // Digital pin 15 + + PB_0, // Digital pin 16 + PB_1, // Digital pin 17 + PB_2, // Digital pin 18 + PB_3, // Digital pin 19 + PB_4, // Digital pin 20 + PB_5, // Digital pin 21 + PB_6, // Digital pin 22 + PB_7, // Digital pin 23 + PB_8, // Digital pin 24 + PB_9, // Digital pin 25 + PB_10, // Digital pin 26 + PB_12, // Digital pin 27 + PB_13, // Digital pin 28 + PB_14, // Digital pin 29 + PB_15, // Digital pin 30 + + PC_0, // Digital pin 31 + PC_1, // Digital pin 32 + PC_2, // Digital pin 33 + PC_3, // Digital pin 34 + PC_4, // Digital pin 35 + PC_5, // Digital pin 36 + PC_6, // Digital pin 37 + PC_7, // Digital pin 38 + PC_8, // Digital pin 39 + PC_9, // Digital pin 40 + PC_10, // Digital pin 41 + PC_11, // Digital pin 42 + PC_12, // Digital pin 43 + PC_13, // Digital pin 44 + PC_14, // Digital pin 45 + PC_15, // Digital pin 46 + + PD_2, // Digital pin 47 + + PH_0, // Digital pin 48, used by the external oscillator + PH_1 // Digital pin 49, used by the external oscillator +}; + +#ifdef __cplusplus +} +#endif + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * @brief Configures the System clock source, PLL Multiplier and Divider factors, + * AHB/APBx prescalers and Flash settings + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ + +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ +static uint8_t SetSysClock_PLL_HSE(uint8_t bypass) +{ + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + // Enable HSE oscillator and activate PLL with HSE as source + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + if (bypass == 0) { + RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT + } else { + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN + } + + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8) + RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336) + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4) + RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> OK for USB + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + return 0; // FAIL + } + + // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 84 MHz + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 84 MHz + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 42 MHz + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 84 MHz + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + return 0; // FAIL + } + + /* Output clock on MCO1 pin(PA8) for debugging purpose */ + /* + if (bypass == 0) + HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz + else + HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz + */ + + return 1; // OK +} + +/******************************************************************************/ +/* PLL (clocked by HSI) used as System clock source */ +/******************************************************************************/ +uint8_t SetSysClock_PLL_HSI(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + // Enable HSI oscillator and activate PLL with HSI as source + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 16; // VCO input clock = 1 MHz (16 MHz / 16) + RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336) + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4) + RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> freq is ok but not precise enough + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + return 0; // FAIL + } + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 84 MHz + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 84 MHz + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 42 MHz + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 84 MHz + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + return 0; // FAIL + } + + /* Output clock on MCO1 pin(PA8) for debugging purpose */ + //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz + + return 1; // OK +} + +WEAK void SystemClock_Config(void) +{ + /* 1- If fail try to start with HSE and external xtal */ + if (SetSysClock_PLL_HSE(0) == 0) { + /* 2- Try to start with HSE and external clock */ + if (SetSysClock_PLL_HSE(1) == 0) { + /* 3- If fail start with HSI clock */ + if (SetSysClock_PLL_HSI() == 0) { + Error_Handler(); + } + } + } + /* Output clock on MCO2 pin(PC9) for debugging purpose */ + //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4); +} + +#ifdef __cplusplus +} +#endif \ No newline at end of file diff --git a/variants/Generic_F401Rx/variant.h b/variants/Generic_F401Rx/variant.h new file mode 100644 index 0000000000..6b2021b3b3 --- /dev/null +++ b/variants/Generic_F401Rx/variant.h @@ -0,0 +1,149 @@ +/* + Copyright (c) 2011 Arduino. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef _VARIANT_ARDUINO_STM32_ +#define _VARIANT_ARDUINO_STM32_ + +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + + +// | ANALOG | USART | TWI | SPI | SPECIAL | +// |--------|-----------|----------|------------------------|-----------| +#define PA0 0 // | A0 | | | | | +#define PA1 1 // | A1 | | | | | +#define PA2 2 // | A2 | USART2_TX | | | | +#define PA3 3 // | A3 | USART2_RX | | | | +#define PA4 4 // | A4 | | | SPI1_SS, (SPI3_SS) | | +#define PA5 5 // | A5 | | | SPI1_SCK | | +#define PA6 6 // | A6 | | | SPI1_MISO | | +#define PA7 7 // | A7 | | | SPI1_MOSI | | +#define PA8 8 // | | | TWI3_SCL | | | +#define PA9 9 // | | USART1_TX | | | | +#define PA10 10 // | | USART1_RX | | | | +#define PA11 11 // | | USART6_TX | | | | +#define PA12 12 // | | USART6_RX | | | | +#define PA13 13 // | | | | | SWD_SWDIO | +#define PA14 14 // | | | | | SWD_SWCLK | +#define PA15 15 // | | | | SPI1_SS, (SPI3_SS) | | +// |--------|-----------|----------|------------------------|-----------| +#define PB0 16 // | A8 | | | | | +#define PB1 17 // | A9 | | | | | +#define PB2 18 // | | | | | BOOT1 | +#define PB3 19 // | | | TWI2_SDA | SPI1_SCK, (SPI3_SCK) | | +#define PB4 20 // | | | TWI3_SDA | SPI1_MISO, (SPI3_MISO) | | +#define PB5 21 // | | | | SPI1_MOSI, (SPI3_MOSI) | | +#define PB6 22 // | | USART1_TX | TWI1_SCL | | | +#define PB7 23 // | | USART1_RX | TWI1_SDA | | | +#define PB8 24 // | | | TWI1_SCL | | | +#define PB9 25 // | | | TWI1_SDA | SPI2_SS | | +#define PB10 26 // | | | TWI2_SCL | SPI2_SCK | | +#define PB12 27 // | | | | SPI2_SS | | +#define PB13 28 // | | | | SPI2_SCK | | +#define PB14 29 // | | | | SPI2_MISO | | +#define PB15 30 // | | | | SPI2_MOSI | | +// |--------|-----------|----------|------------------------|-----------| +#define PC0 31 // | A10 | | | | | +#define PC1 32 // | A11 | | | | | +#define PC2 33 // | A12 | | | SPI2_MISO | | +#define PC3 34 // | A13 | | | SPI2_MOSI | | +#define PC4 35 // | A14 | | | | | +#define PC5 36 // | A15 | | | | | +#define PC6 37 // | | USART6_TX | | | | +#define PC7 38 // | | USART6_RX | | | | +#define PC8 39 // | | | | | | +#define PC9 40 // | | | TWI3_SDA | | | +#define PC10 41 // | | | | SPI3_SCK | | +#define PC11 42 // | | | | SPI3_MISO | | +#define PC12 43 // | | | | SPI3_MOSI | | +#define PC13 44 // | | | | | | +#define PC14 45 // | | | | | OSC32_IN | +#define PC15 46 // | | | | | OSC32_OUT | +// |--------|-----------|----------|------------------------|-----------| +#define PD2 47 // | | | | | | +// |--------|-----------|----------|------------------------|-----------| +#define PH0 48 // | | | | | OSC_IN | +#define PH1 49 // | | | | | OSC_OUT | +// |--------|-----------|----------|------------------------|-----------| + +// This must be a literal +#define NUM_DIGITAL_PINS 50 +#define NUM_ANALOG_INPUTS 16 +#define NUM_ANALOG_FIRST 0 + +// On-board LED pin number +#define LED_BUILTIN PA5 +#define LED_GREEN LED_BUILTIN + +// On-board user button +#define USER_BTN PC13 + +// SPI definitions +#define PIN_SPI_SS PA4 +#define PIN_SPI_SS1 PA4 +#define PIN_SPI_SS2 PB12 +#define PIN_SPI_SS3 PA15 +#define PIN_SPI_MOSI PA7 +#define PIN_SPI_MISO PA6 +#define PIN_SPI_SCK PA5 + +// I2C definitions +#define PIN_WIRE_SDA PB9 +#define PIN_WIRE_SCL PB8 + +// Timer Definitions +#define TIMER_TONE TIM10 +#define TIMER_SERVO TIM11 + +// UART Definitions +#define SERIAL_UART_INSTANCE 2 //Connected to ST-Link + +// Default pin used for 'Serial' instance (ex: ST-Link) +// Mandatory for Firmata +#define PIN_SERIAL_RX PA3 +#define PIN_SERIAL_TX PA2 + +#ifdef __cplusplus +} // extern "C" +#endif +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus +// These serial port names are intended to allow libraries and architecture-neutral +// sketches to automatically default to the correct port name for a particular type +// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, +// the first hardware serial port whose RX/TX pins are not dedicated to another use. +// +// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor +// +// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial +// +// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library +// +// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. +// +// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX +// pins are NOT connected to anything by default. +#define SERIAL_PORT_MONITOR Serial +#define SERIAL_PORT_HARDWARE Serial +#endif + +#endif /* _VARIANT_ARDUINO_STM32_ */ \ No newline at end of file From edcce4d6377c96f8883e033c50af8bbf54e0d4ca Mon Sep 17 00:00:00 2001 From: MCUdude Date: Tue, 17 Dec 2019 17:42:46 +0100 Subject: [PATCH 2/2] Support new analog pin handling The new way of handlig analog pins was introduced in #800 and makes 'uneven' analog pin positions easier to implement in a nice way. This is great for generic pinouts. --- variants/Generic_F401Rx/variant.cpp | 22 +++++- variants/Generic_F401Rx/variant.h | 115 ++++++++++++++-------------- 2 files changed, 78 insertions(+), 59 deletions(-) diff --git a/variants/Generic_F401Rx/variant.cpp b/variants/Generic_F401Rx/variant.cpp index 8c12839d1d..95411363e9 100644 --- a/variants/Generic_F401Rx/variant.cpp +++ b/variants/Generic_F401Rx/variant.cpp @@ -22,7 +22,7 @@ extern "C" { #endif -// Pin number +// Digital PinName array const PinName digitalPin[] = { PA_0, // Digital pin 0 PA_1, // Digital pin 1 @@ -80,6 +80,26 @@ const PinName digitalPin[] = { PH_1 // Digital pin 49, used by the external oscillator }; +// Analog (Ax) pin number array +const uint32_t analogInPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 31, // A10, PC0 + 32, // A11, PC1 + 33, // A12, PC2 + 34, // A13, PC3 + 35, // A14, PC4 + 36 // A15, PC5 +}; + #ifdef __cplusplus } #endif diff --git a/variants/Generic_F401Rx/variant.h b/variants/Generic_F401Rx/variant.h index 6b2021b3b3..af18b79747 100644 --- a/variants/Generic_F401Rx/variant.h +++ b/variants/Generic_F401Rx/variant.h @@ -24,68 +24,67 @@ extern "C" { #endif // __cplusplus -// | ANALOG | USART | TWI | SPI | SPECIAL | -// |--------|-----------|----------|------------------------|-----------| -#define PA0 0 // | A0 | | | | | -#define PA1 1 // | A1 | | | | | -#define PA2 2 // | A2 | USART2_TX | | | | -#define PA3 3 // | A3 | USART2_RX | | | | -#define PA4 4 // | A4 | | | SPI1_SS, (SPI3_SS) | | -#define PA5 5 // | A5 | | | SPI1_SCK | | -#define PA6 6 // | A6 | | | SPI1_MISO | | -#define PA7 7 // | A7 | | | SPI1_MOSI | | -#define PA8 8 // | | | TWI3_SCL | | | -#define PA9 9 // | | USART1_TX | | | | -#define PA10 10 // | | USART1_RX | | | | -#define PA11 11 // | | USART6_TX | | | | -#define PA12 12 // | | USART6_RX | | | | -#define PA13 13 // | | | | | SWD_SWDIO | -#define PA14 14 // | | | | | SWD_SWCLK | -#define PA15 15 // | | | | SPI1_SS, (SPI3_SS) | | -// |--------|-----------|----------|------------------------|-----------| -#define PB0 16 // | A8 | | | | | -#define PB1 17 // | A9 | | | | | -#define PB2 18 // | | | | | BOOT1 | -#define PB3 19 // | | | TWI2_SDA | SPI1_SCK, (SPI3_SCK) | | -#define PB4 20 // | | | TWI3_SDA | SPI1_MISO, (SPI3_MISO) | | -#define PB5 21 // | | | | SPI1_MOSI, (SPI3_MOSI) | | -#define PB6 22 // | | USART1_TX | TWI1_SCL | | | -#define PB7 23 // | | USART1_RX | TWI1_SDA | | | -#define PB8 24 // | | | TWI1_SCL | | | -#define PB9 25 // | | | TWI1_SDA | SPI2_SS | | -#define PB10 26 // | | | TWI2_SCL | SPI2_SCK | | -#define PB12 27 // | | | | SPI2_SS | | -#define PB13 28 // | | | | SPI2_SCK | | -#define PB14 29 // | | | | SPI2_MISO | | -#define PB15 30 // | | | | SPI2_MOSI | | -// |--------|-----------|----------|------------------------|-----------| -#define PC0 31 // | A10 | | | | | -#define PC1 32 // | A11 | | | | | -#define PC2 33 // | A12 | | | SPI2_MISO | | -#define PC3 34 // | A13 | | | SPI2_MOSI | | -#define PC4 35 // | A14 | | | | | -#define PC5 36 // | A15 | | | | | -#define PC6 37 // | | USART6_TX | | | | -#define PC7 38 // | | USART6_RX | | | | -#define PC8 39 // | | | | | | -#define PC9 40 // | | | TWI3_SDA | | | -#define PC10 41 // | | | | SPI3_SCK | | -#define PC11 42 // | | | | SPI3_MISO | | -#define PC12 43 // | | | | SPI3_MOSI | | -#define PC13 44 // | | | | | | -#define PC14 45 // | | | | | OSC32_IN | -#define PC15 46 // | | | | | OSC32_OUT | -// |--------|-----------|----------|------------------------|-----------| -#define PD2 47 // | | | | | | -// |--------|-----------|----------|------------------------|-----------| -#define PH0 48 // | | | | | OSC_IN | -#define PH1 49 // | | | | | OSC_OUT | -// |--------|-----------|----------|------------------------|-----------| +// | DIGITAL | ANALOG | USART | TWI | SPI | SPECIAL | +// |---------|--------|-----------|----------|------------------------|-----------| +#define PA0 A0 // | 0 | A0 | | | | | +#define PA1 A1 // | 1 | A1 | | | | | +#define PA2 A2 // | 2 | A2 | USART2_TX | | | | +#define PA3 A3 // | 3 | A3 | USART2_RX | | | | +#define PA4 A4 // | 4 | A4 | | | SPI1_SS, (SPI3_SS) | | +#define PA5 A5 // | 5 | A5 | | | SPI1_SCK | | +#define PA6 A6 // | 6 | A6 | | | SPI1_MISO | | +#define PA7 A7 // | 7 | A7 | | | SPI1_MOSI | | +#define PA8 8 // | 8 | | | TWI3_SCL | | | +#define PA9 9 // | 9 | | USART1_TX | | | | +#define PA10 10 // | 10 | | USART1_RX | | | | +#define PA11 11 // | 11 | | USART6_TX | | | | +#define PA12 12 // | 12 | | USART6_RX | | | | +#define PA13 13 // | 13 | | | | | SWD_SWDIO | +#define PA14 14 // | 14 | | | | | SWD_SWCLK | +#define PA15 15 // | 15 | | | | SPI1_SS, (SPI3_SS) | | +// |---------|--------|-----------|----------|------------------------|-----------| +#define PB0 A8 // | 16 | A8 | | | | | +#define PB1 A9 // | 17 | A9 | | | | | +#define PB2 18 // | 18 | | | | | BOOT1 | +#define PB3 19 // | 19 | | | TWI2_SDA | SPI1_SCK, (SPI3_SCK) | | +#define PB4 20 // | 20 | | | TWI3_SDA | SPI1_MISO, (SPI3_MISO) | | +#define PB5 21 // | 21 | | | | SPI1_MOSI, (SPI3_MOSI) | | +#define PB6 22 // | 22 | | USART1_TX | TWI1_SCL | | | +#define PB7 23 // | 23 | | USART1_RX | TWI1_SDA | | | +#define PB8 24 // | 24 | | | TWI1_SCL | | | +#define PB9 25 // | 25 | | | TWI1_SDA | SPI2_SS | | +#define PB10 26 // | 26 | | | TWI2_SCL | SPI2_SCK | | +#define PB12 27 // | 27 | | | | SPI2_SS | | +#define PB13 28 // | 28 | | | | SPI2_SCK | | +#define PB14 29 // | 29 | | | | SPI2_MISO | | +#define PB15 30 // | 30 | | | | SPI2_MOSI | | +// |---------|--------|-----------|----------|------------------------|-----------| +#define PC0 A10 // | 31 | A10 | | | | | +#define PC1 A11 // | 32 | A11 | | | | | +#define PC2 A12 // | 33 | A12 | | | SPI2_MISO | | +#define PC3 A13 // | 34 | A13 | | | SPI2_MOSI | | +#define PC4 A14 // | 35 | A14 | | | | | +#define PC5 A15 // | 36 | A15 | | | | | +#define PC6 37 // | 37 | | USART6_TX | | | | +#define PC7 38 // | 38 | | USART6_RX | | | | +#define PC8 39 // | 39 | | | | | | +#define PC9 40 // | 40 | | | TWI3_SDA | | | +#define PC10 41 // | 41 | | | | SPI3_SCK | | +#define PC11 42 // | 42 | | | | SPI3_MISO | | +#define PC12 43 // | 43 | | | | SPI3_MOSI | | +#define PC13 44 // | 44 | | | | | | +#define PC14 45 // | 45 | | | | | OSC32_IN | +#define PC15 46 // | 46 | | | | | OSC32_OUT | +// |---------|--------|-----------|----------|------------------------|-----------| +#define PD2 47 // | 47 | | | | | | +// |---------|--------|-----------|----------|------------------------|-----------| +#define PH0 48 // | 48 | | | | | OSC_IN | +#define PH1 49 // | 49 | | | | | OSC_OUT | +// |---------|--------|-----------|----------|------------------------|-----------| // This must be a literal #define NUM_DIGITAL_PINS 50 #define NUM_ANALOG_INPUTS 16 -#define NUM_ANALOG_FIRST 0 // On-board LED pin number #define LED_BUILTIN PA5