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1 | 1 | /* |
2 | 2 | ST7735 - A fast SPI driver for TFT that use Sitronix ST7735. |
3 | | - Version: 1.0p1 |
| 3 | + Version: 1.0p1 K64/66 version |
4 | 4 |
|
5 | 5 | Features: |
6 | 6 | - Very FAST!, expecially with Teensy 3.x where uses hyper optimized SPI. |
@@ -255,7 +255,9 @@ class TFT_ST7735 : public Print { |
255 | 255 |
|
256 | 256 | uint8_t _dc,_rst; |
257 | 257 | uint8_t _bklPin; |
258 | | - //uint8_t _colorSpace; |
| 258 | + #if defined(__MK64FX512__) || defined(__MK66FX1M0__) |
| 259 | + uint8_t _useSPI; |
| 260 | + #endif |
259 | 261 | /* ======================================================================== |
260 | 262 | Low Level SPI Routines |
261 | 263 | ========================================================================*/ |
@@ -444,69 +446,196 @@ class TFT_ST7735 : public Print { |
444 | 446 |
|
445 | 447 | void startTransaction(void) |
446 | 448 | __attribute__((always_inline)) { |
447 | | - SPI.beginTransaction(_ST7735SPI); |
| 449 | + #if defined(__MK20DX128__) || defined(__MK20DX256__) |
| 450 | + SPI.beginTransaction(_ST7735SPI); |
| 451 | + #else |
| 452 | + if (_useSPI == 0){ |
| 453 | + SPI.beginTransaction(_ST7735SPI); |
| 454 | + } else if (_useSPI == 1){ |
| 455 | + SPI1.beginTransaction(_ST7735SPI); |
| 456 | + digitalWriteFast(_cs,LOW); |
| 457 | + } |
| 458 | + #endif |
448 | 459 | } |
449 | 460 |
|
450 | 461 | void endTransaction(void) |
451 | 462 | __attribute__((always_inline)) { |
452 | | - SPI.endTransaction(); |
| 463 | + #if defined(__MK20DX128__) || defined(__MK20DX256__) |
| 464 | + SPI.endTransaction(); |
| 465 | + #else |
| 466 | + if (_useSPI == 0){ |
| 467 | + SPI.endTransaction(); |
| 468 | + } else if (_useSPI == 1){ |
| 469 | + SPI1.endTransaction(); |
| 470 | + } |
| 471 | + #endif |
453 | 472 | } |
| 473 | + |
| 474 | + #if defined(__MK64FX512__) || defined(__MK66FX1M0__) |
| 475 | + void disableCS(void) |
| 476 | + __attribute__((always_inline)) { |
| 477 | + if (_useSPI > 0) digitalWriteFast(_cs,HIGH); |
| 478 | + } |
| 479 | + #endif |
454 | 480 |
|
455 | 481 | //Here's Paul Stoffregen magic in action... |
456 | 482 | void waitFifoNotFull(void) { |
457 | 483 | uint32_t sr; |
458 | 484 | uint32_t tmp __attribute__((unused)); |
| 485 | + #if defined(__MK20DX128__) || defined(__MK20DX256__) |
459 | 486 | do { |
460 | 487 | sr = KINETISK_SPI0.SR; |
461 | 488 | if (sr & 0xF0) tmp = KINETISK_SPI0.POPR; // drain RX FIFO |
462 | 489 | } while ((sr & (15 << 12)) > (3 << 12)); |
| 490 | + #else |
| 491 | + if (_useSPI == 0){ |
| 492 | + do { |
| 493 | + sr = KINETISK_SPI0.SR; |
| 494 | + if (sr & 0xF0) tmp = KINETISK_SPI0.POPR; // drain RX FIFO |
| 495 | + } while ((sr & (15 << 12)) > (3 << 12)); |
| 496 | + } else if (_useSPI == 1){ |
| 497 | + do { |
| 498 | + sr = KINETISK_SPI1.SR; |
| 499 | + if (sr & 0xF0) tmp = KINETISK_SPI1.POPR; // drain RX FIFO |
| 500 | + } while ((sr & (15 << 12)) > (0 << 12)); |
| 501 | + } |
| 502 | + #endif |
463 | 503 | } |
464 | 504 |
|
465 | 505 |
|
466 | 506 | void waitTransmitComplete(uint32_t mcr) __attribute__((always_inline)) { |
467 | 507 | uint32_t tmp __attribute__((unused)); |
468 | | - while (1) { |
469 | | - uint32_t sr = KINETISK_SPI0.SR; |
470 | | - if (sr & SPI_SR_EOQF) break; // wait for last transmit |
471 | | - if (sr & 0xF0) tmp = KINETISK_SPI0.POPR; |
472 | | - } |
473 | | - KINETISK_SPI0.SR = SPI_SR_EOQF; |
474 | | - SPI0_MCR = mcr; |
475 | | - while (KINETISK_SPI0.SR & 0xF0) {tmp = KINETISK_SPI0.POPR;} |
| 508 | + uint32_t sr = 0; |
| 509 | + #if defined(__MK20DX128__) || defined(__MK20DX256__) |
| 510 | + while (1) { |
| 511 | + sr = KINETISK_SPI0.SR; |
| 512 | + if (sr & SPI_SR_EOQF) break; // wait for last transmit |
| 513 | + if (sr & 0xF0) tmp = KINETISK_SPI0.POPR; |
| 514 | + } |
| 515 | + KINETISK_SPI0.SR = SPI_SR_EOQF; |
| 516 | + SPI0_MCR = mcr; |
| 517 | + while (KINETISK_SPI0.SR & 0xF0) {tmp = KINETISK_SPI0.POPR;} |
| 518 | + #else |
| 519 | + if (_useSPI == 0){ |
| 520 | + while (1) { |
| 521 | + sr = KINETISK_SPI0.SR; |
| 522 | + if (sr & SPI_SR_EOQF) break; // wait for last transmit |
| 523 | + if (sr & 0xF0) tmp = KINETISK_SPI0.POPR; |
| 524 | + } |
| 525 | + KINETISK_SPI0.SR = SPI_SR_EOQF; |
| 526 | + SPI0_MCR = mcr; |
| 527 | + while (KINETISK_SPI0.SR & 0xF0) {tmp = KINETISK_SPI0.POPR;} |
| 528 | + } else if (_useSPI == 1){ |
| 529 | + while (1) { |
| 530 | + sr = KINETISK_SPI1.SR; |
| 531 | + if (sr & SPI_SR_EOQF) break; // wait for last transmit |
| 532 | + if (sr & 0xF0) tmp = KINETISK_SPI1.POPR; |
| 533 | + } |
| 534 | + KINETISK_SPI1.SR = SPI_SR_EOQF; |
| 535 | + SPI1_MCR = mcr; |
| 536 | + while (KINETISK_SPI1.SR & 0xF0) {tmp = KINETISK_SPI1.POPR;} |
| 537 | + } |
| 538 | + #endif |
476 | 539 | } |
477 | 540 |
|
478 | 541 | void writecommand_cont(const uint8_t c) __attribute__((always_inline)) { |
479 | | - KINETISK_SPI0.PUSHR = c | (pcs_command << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_CONT; |
| 542 | + #if defined(__MK20DX128__) || defined(__MK20DX256__) |
| 543 | + KINETISK_SPI0.PUSHR = c | (pcs_command << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_CONT; |
| 544 | + #else |
| 545 | + if (_useSPI == 0){ |
| 546 | + KINETISK_SPI0.PUSHR = c | (pcs_command << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_CONT; |
| 547 | + } else if (_useSPI == 1){ |
| 548 | + KINETISK_SPI1.PUSHR = c | (pcs_command << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_CONT; |
| 549 | + } |
| 550 | + #endif |
480 | 551 | waitFifoNotFull(); |
481 | 552 | } |
482 | 553 |
|
483 | 554 | void writedata8_cont(uint8_t d) __attribute__((always_inline)) { |
484 | | - KINETISK_SPI0.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_CONT; |
| 555 | + #if defined(__MK20DX128__) || defined(__MK20DX256__) |
| 556 | + KINETISK_SPI0.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_CONT; |
| 557 | + #else |
| 558 | + if (_useSPI == 0){ |
| 559 | + KINETISK_SPI0.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_CONT; |
| 560 | + } else if (_useSPI == 1){ |
| 561 | + KINETISK_SPI1.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_CONT; |
| 562 | + } |
| 563 | + #endif |
485 | 564 | waitFifoNotFull(); |
486 | 565 | } |
487 | 566 |
|
488 | 567 | void writedata16_cont(uint16_t d) __attribute__((always_inline)) { |
489 | | - KINETISK_SPI0.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(1) | SPI_PUSHR_CONT; |
| 568 | + #if defined(__MK20DX128__) || defined(__MK20DX256__) |
| 569 | + KINETISK_SPI0.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(1) | SPI_PUSHR_CONT; |
| 570 | + #else |
| 571 | + if (_useSPI == 0){ |
| 572 | + KINETISK_SPI0.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(1) | SPI_PUSHR_CONT; |
| 573 | + } else if (_useSPI == 1){ |
| 574 | + KINETISK_SPI1.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(1) | SPI_PUSHR_CONT; |
| 575 | + } |
| 576 | + #endif |
490 | 577 | waitFifoNotFull(); |
491 | 578 | } |
492 | 579 |
|
493 | 580 | void writecommand_last(const uint8_t c) __attribute__((always_inline)) { |
494 | | - uint32_t mcr = SPI0_MCR; |
495 | | - KINETISK_SPI0.PUSHR = c | (pcs_command << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_EOQ; |
| 581 | + uint32_t mcr = 0; |
| 582 | + #if defined(__MK20DX128__) || defined(__MK20DX256__) |
| 583 | + mcr = SPI0_MCR; |
| 584 | + KINETISK_SPI0.PUSHR = c | (pcs_command << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_EOQ; |
| 585 | + #else |
| 586 | + if (_useSPI == 0){ |
| 587 | + mcr = SPI0_MCR; |
| 588 | + KINETISK_SPI0.PUSHR = c | (pcs_command << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_EOQ; |
| 589 | + } else if (_useSPI == 1){ |
| 590 | + mcr = SPI1_MCR; |
| 591 | + KINETISK_SPI1.PUSHR = c | (pcs_command << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_EOQ; |
| 592 | + } |
| 593 | + #endif |
496 | 594 | waitTransmitComplete(mcr); |
| 595 | + #if defined(__MK64FX512__) || defined(__MK66FX1M0__) |
| 596 | + disableCS(); |
| 597 | + #endif |
497 | 598 | } |
498 | 599 |
|
499 | 600 |
|
500 | 601 | void writedata8_last(uint8_t c) __attribute__((always_inline)) { |
501 | | - uint32_t mcr = SPI0_MCR; |
502 | | - KINETISK_SPI0.PUSHR = c | (pcs_data << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_EOQ; |
| 602 | + uint32_t mcr = 0; |
| 603 | + #if defined(__MK20DX128__) || defined(__MK20DX256__) |
| 604 | + mcr = SPI0_MCR; |
| 605 | + KINETISK_SPI0.PUSHR = c | (pcs_data << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_EOQ; |
| 606 | + #else |
| 607 | + if (_useSPI == 0){ |
| 608 | + mcr = SPI0_MCR; |
| 609 | + KINETISK_SPI0.PUSHR = c | (pcs_data << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_EOQ; |
| 610 | + } else if (_useSPI == 1){ |
| 611 | + mcr = SPI1_MCR; |
| 612 | + KINETISK_SPI1.PUSHR = c | (pcs_data << 16) | SPI_PUSHR_CTAS(0) | SPI_PUSHR_EOQ; |
| 613 | + } |
| 614 | + #endif |
503 | 615 | waitTransmitComplete(mcr); |
| 616 | + #if defined(__MK64FX512__) || defined(__MK66FX1M0__) |
| 617 | + disableCS(); |
| 618 | + #endif |
504 | 619 | } |
505 | 620 |
|
506 | 621 | void writedata16_last(uint16_t d) __attribute__((always_inline)) { |
507 | | - uint32_t mcr = SPI0_MCR; |
508 | | - KINETISK_SPI0.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(1) | SPI_PUSHR_EOQ; |
| 622 | + uint32_t mcr = 0; |
| 623 | + #if defined(__MK20DX128__) || defined(__MK20DX256__) |
| 624 | + mcr = SPI0_MCR; |
| 625 | + KINETISK_SPI0.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(1) | SPI_PUSHR_EOQ; |
| 626 | + #else |
| 627 | + if (_useSPI == 0){ |
| 628 | + mcr = SPI0_MCR; |
| 629 | + KINETISK_SPI0.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(1) | SPI_PUSHR_EOQ; |
| 630 | + } else if (_useSPI == 1){ |
| 631 | + mcr = SPI1_MCR; |
| 632 | + KINETISK_SPI1.PUSHR = d | (pcs_data << 16) | SPI_PUSHR_CTAS(1) | SPI_PUSHR_EOQ; |
| 633 | + } |
| 634 | + #endif |
509 | 635 | waitTransmitComplete(mcr); |
| 636 | + #if defined(__MK64FX512__) || defined(__MK66FX1M0__) |
| 637 | + disableCS(); |
| 638 | + #endif |
510 | 639 | } |
511 | 640 |
|
512 | 641 | /* ----------------- ARM (XTENSA ESP8266) ------------------------*/ |
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