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| 1 | +// RUN: %target-swift-emit-irgen \ |
| 2 | +// RUN: %s \ |
| 3 | +// RUN: -enable-experimental-feature CoroutineAccessors \ |
| 4 | +// RUN: -enable-arm64-corocc \ |
| 5 | +// RUN: -enable-x86_64-corocc \ |
| 6 | +// RUN: | %IRGenFileCheck %s |
| 7 | + |
| 8 | +// REQUIRES: CPU=arm64 || CPU=arm64e || CPU=x86_64 |
| 9 | +// REQUIRES: swift_feature_CoroutineAccessors |
| 10 | + |
| 11 | +// CHECK-LABEL: @__swift_coro_alloc_( |
| 12 | +// CHECK-SAME: ptr [[ALLOCATOR:%[^,]+]] |
| 13 | +// CHECK-SAME: i64 [[SIZE:%[^)]+]] |
| 14 | +// CHECK-SAME: ) |
| 15 | +// CHECK-SAME: { |
| 16 | +// CHECK: entry: |
| 17 | +// CHECK: [[USE_POPLESS:%[^,]+]] = icmp eq ptr [[ALLOCATOR]], null |
| 18 | +// CHECK: br i1 [[USE_POPLESS]], |
| 19 | +// CHECK-SAME: label %coro.return.popless |
| 20 | +// CHECK-SAME: label %coro.return.normal |
| 21 | +// CHECK: coro.return.popless: |
| 22 | +// CHECK: [[STACK_ALLOCATION:%[^,]+]] = alloca i8, i64 [[SIZE]], align 16 |
| 23 | +// CHECK: musttail call void @llvm.ret.popless() |
| 24 | +// CHECK: ret ptr [[STACK_ALLOCATION]] |
| 25 | +// CHECK: coro.return.normal: |
| 26 | +// CHECK: [[OTHER_ALLOCATION:%[^,]+]] = call swiftcc ptr @swift_coro_alloc( |
| 27 | +// CHECK-SAME: ptr [[ALLOCATOR]] |
| 28 | +// CHECK-SAME: i64 [[SIZE]] |
| 29 | +// CHECK-SAME: ) |
| 30 | +// CHECK: ret ptr [[OTHER_ALLOCATION]] |
| 31 | +// CHECK: } |
| 32 | + |
| 33 | +public var _i: Int = 0 |
| 34 | + |
| 35 | +public var i: Int { |
| 36 | + read { |
| 37 | + yield _i |
| 38 | + } |
| 39 | +} |
| 40 | + |
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