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Merge pull request #303 from tactcomplabs/csrs_pseudoinstruction
Add csrs pseudoinstruction
2 parents 1c9f355 + ccf1044 commit 1484539

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include/insns/Zicsr.h

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Original file line numberDiff line numberDiff line change
@@ -100,7 +100,8 @@ class Zicsr : public RevExt {
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RevZicsrInstDefaults().SetMnemonic( "fsflags %rs" ).SetFunct3( 0b001 ).SetImplFunc( csrrw ).SetPredicate( []( uint32_t Inst ){ return DECODE_RD( Inst ) != 0 && DECODE_IMM12( Inst ) == 0x1; } ),
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RevZicsrInstDefaults().SetMnemonic( "fsrm %rs" ).SetFunct3( 0b001 ).SetImplFunc( csrrw ).SetPredicate( []( uint32_t Inst ){ return DECODE_RD( Inst ) != 0 && DECODE_IMM12( Inst ) == 0x2; } ),
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RevZicsrInstDefaults().SetMnemonic( "csrrs %rd, %csr, %rs1" ).SetFunct3( 0b010 ).SetImplFunc( csrrs ).SetPredicate( []( uint32_t Inst ){ return DECODE_RS1( Inst ) != 0; } ),
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RevZicsrInstDefaults().SetMnemonic( "csrrs %rd, %csr, %rs1" ).SetFunct3( 0b010 ).SetImplFunc( csrrs ).SetPredicate( []( uint32_t Inst ){ return DECODE_RS1( Inst ) != 0 && DECODE_RD( Inst ) != 0; } ),
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RevZicsrInstDefaults().SetMnemonic( "csrs %csr, %rs1" ).SetFunct3( 0b010 ).SetImplFunc( csrrs ).SetPredicate( []( uint32_t Inst ){ return DECODE_RS1( Inst ) != 0 && DECODE_RD( Inst ) == 0; } ),
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RevZicsrInstDefaults().SetMnemonic( "csrr %rd, %csr" ).SetFunct3( 0b010 ).SetImplFunc( csrrs ).SetPredicate( []( uint32_t Inst ){ return DECODE_RS1( Inst ) == 0 && DECODE_IMM12( Inst ) != 0x1 && DECODE_IMM12( Inst ) != 0x2 && [](auto imm){ return imm < 0xc80 || imm > 0xc82; }( DECODE_IMM12( Inst ) | 0x80 ); } ),
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RevZicsrInstDefaults().SetMnemonic( "frflags %rd" ).SetFunct3( 0b010 ).SetImplFunc( csrrs ).SetPredicate( []( uint32_t Inst ){ return DECODE_RS1( Inst ) == 0 && DECODE_IMM12( Inst ) == 0x1; } ),
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RevZicsrInstDefaults().SetMnemonic( "frrm %rd" ).SetFunct3( 0b010 ).SetImplFunc( csrrs ).SetPredicate( []( uint32_t Inst ){ return DECODE_RS1( Inst ) == 0 && DECODE_IMM12( Inst ) == 0x2; } ),

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