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Commit 1d4700c

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author
brentru
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add pindefs for tft and tft control
1 parent 8f6eac9 commit 1d4700c

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2 files changed

+47
-34
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2 files changed

+47
-34
lines changed

ports/atmel-samd/boards/pyportal_titano/board.c

Lines changed: 38 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,9 @@
2828
#include "mpconfigboard.h"
2929
#include "hal/include/hal_gpio.h"
3030

31+
#include "shared-bindings/busio/SPI.h"
32+
#include "shared-bindings/displayio/FourWire.h"
33+
3134
#include "shared-module/displayio/__init__.h"
3235
#include "shared-module/displayio/mipi_constants.h"
3336

@@ -36,49 +39,50 @@
3639
#define DELAY 0x80
3740

3841
uint8_t display_init_sequence[] = {
39-
0xEF, 3, 0x03, 0x80, 0x02,
40-
0xCF, 3, 0x00, 0xC1, 0x30,
41-
0xED, 4, 0x64, 0x03, 0x12, 0x81,
42-
0xE8, 3, 0x85, 0x00, 0x78,
43-
0xCB, 5, 0x39, 0x2C, 0x00, 0x34, 0x02,
44-
0xF7, 1, 0x20,
45-
0xEA, 2, 0x00, 0x00,
46-
0xc0, 1, 0x23, // Power control VRH[5:0]
47-
0xc1, 1, 0x10, // Power control SAP[2:0];BT[3:0]
48-
0xc5, 2, 0x3e, 0x28, // VCM control
49-
0xc7, 1, 0x86, // VCM control2
50-
0x36, 1, 0xa8, // Memory Access Control
51-
0x37, 1, 0x00, // Vertical scroll zero
52-
0x3a, 1, 0x55, // COLMOD: Pixel Format Set
53-
0xb1, 2, 0x00, 0x18, // Frame Rate Control (In Normal Mode/Full Colors)
54-
0xb6, 3, 0x08, 0xa2, 0x27, // Display Function Control
55-
0xF2, 1, 0x00, // 3Gamma Function Disable
56-
0x26, 1, 0x01, // Gamma curve selected
57-
0xe0, 15, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, // Set Gamma
58-
0x4E, 0xF1, 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00,
59-
0xe1, 15, 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, // Set Gamma
60-
0x31, 0xC1, 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F,
61-
0x11, DELAY, 120, // Exit Sleep
62-
0x29, DELAY, 120, // Display on
42+
0x01, 2, 0x80, 0x64, // swreset
43+
0xB9, 5, 0x83, 0xFF, 0x83, 0x57, 0xFF,
44+
0xB3, 5, 0x04, 0x80, 0x00, 0x06, 0x06,
45+
0xB6, 2, 0x01, 0x25,
46+
0xCC, 2, 0x01, 0x05,
47+
0xB1, 7,
48+
0x06, 0x00, 0x15, 0x1C, 0x1C, 0x83, 0xAA,
49+
0xC0, 7,
50+
0x06, 0x50, 0x50, 0x01, 0x3C, 0x1E, 0x08,
51+
0xB4, 8,
52+
0x07, 0x02, 0x40, 0x00, 0x2A, 0x2A, 0x0D, 0x78,
53+
0xE0, 34,
54+
0x02, 0x0A, 0x11, 0x1d, 0x23, 0x35, 0x41, 0x4b, 0x4b,
55+
0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x02, 0x0A,
56+
0x11, 0x1d, 0x23, 0x35, 0x41, 0x4b, 0x4b, 0x42, 0x3A,
57+
0x27, 0x1B, 0x08, 0x09, 0x03, 0x00, 0x01,
58+
0x3a, 1, 0x55,
59+
0x36, 1, 0xC0,
60+
0x35, 1, 0x00,
61+
0x44, 2, 0x00, 0x02,
62+
0x11, 0x80 + 150/5, // Exit Sleep, then delay 150 ms
63+
0x29, 0x80 + 50/5
6364
};
6465

6566
void board_init(void) {
66-
displayio_parallelbus_obj_t* bus = &displays[0].parallel_bus;
67-
bus->base.type = &displayio_parallelbus_type;
68-
common_hal_displayio_parallelbus_construct(bus,
69-
&pin_PA16, // Data0
70-
&pin_PB05, // Command or data
71-
&pin_PB06, // Chip select
72-
&pin_PB09, // Write
73-
&pin_PB04, // Read
74-
&pin_PA00); // Reset
67+
busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
68+
common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA12, &pin_PA14);
69+
common_hal_busio_spi_never_reset(spi);
70+
71+
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;
72+
bus->base.type = &displayio_fourwire_type;
73+
common_hal_displayio_fourwire_construct(bus,
74+
spi,
75+
&pin_PB05, // TFT_DC Command or data
76+
&pin_PB06, // TFT_CS Chip select
77+
&pin_PA00, // TFT_RST Reset
78+
24000000);
7579

7680
displayio_display_obj_t* display = &displays[0].display;
7781
display->base.type = &displayio_display_type;
7882
common_hal_displayio_display_construct(display,
7983
bus,
8084
320, // Width
81-
240, // Height
85+
480, // Height
8286
0, // column start
8387
0, // row start
8488
0, // rotation

ports/atmel-samd/boards/pyportal_titano/pins.c

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,15 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
8080
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
8181
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
8282

83+
// TFT control pins
84+
{MP_OBJ_NEW_QSTR(MP_QSTR_TFT_LITE), MP_ROM_PTR(&pin_PB31)},
85+
{MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_PA12)},
86+
{MP_OBJ_NEW_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_PA13)},
87+
{MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MISO), MP_ROM_PTR(&pin_PA14)},
88+
{MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RST), MP_ROM_PTR(&pin_PA00)},
89+
{MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PB06)},
90+
{MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PB05)},
91+
8392
{ MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) },
8493
};
8594
MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);

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