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Adding Custom RR Graph Builder to OpenFPGA

docsDocumentationDocumentation

external_libs

infraProject InfrastructureProject Infrastructure

lang-cppC/C++ codeC/C++ code

lang-makeCMake/Make codeCMake/Make code

lang-perlPerl codePerl code

lang-pythonPython codePython code

lang-shellShell scripts (bash etc.)Shell scripts (bash etc.)

libarchfpgaLibrary for handling FPGA Architecture descriptionsLibrary for handling FPGA Architecture descriptions

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 3325

#3325 In verilog-to-routing/vtr-verilog-to-routing;

· amin1377 opened on Oct 28, 2025

3D OPIN-CHANZ connectivity

lang-cppC/C++ codeC/C++ code

libarchfpgaLibrary for handling FPGA Architecture descriptionsLibrary for handling FPGA Architecture descriptions

libvtrutil

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 3323

#3323 In verilog-to-routing/vtr-verilog-to-routing;

· soheilshahrouz opened on Oct 28, 2025

[AP][Solver][3D] 3D AP Solver Support

lang-cppC/C++ codeC/C++ code

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 3265

#3265 In verilog-to-routing/vtr-verilog-to-routing;

· AlexandreSinger opened on Sep 5, 2025

[WIP] Fixing Subtraction CIN Bug

lang-cppC/C++ codeC/C++ code

Parmys

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 3261

#3261 In verilog-to-routing/vtr-verilog-to-routing;

· loglav03 opened on Aug 29, 2025

Add --place_freq command line option

docsDocumentationDocumentation

lang-cppC/C++ codeC/C++ code

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 3204

#3204 In verilog-to-routing/vtr-verilog-to-routing;

· soheilshahrouz opened on Jul 21, 2025

[Place] Centriod Initial Placement

lang-cppC/C++ codeC/C++ code

libarchfpgaLibrary for handling FPGA Architecture descriptionsLibrary for handling FPGA Architecture descriptions

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 3018

#3018 In verilog-to-routing/vtr-verilog-to-routing;

· amin1377 opened on May 1, 2025

Congestion modeling in placement stage

docsDocumentationDocumentation

lang-cppC/C++ codeC/C++ code

libvtrutil

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 3010

#3010 In verilog-to-routing/vtr-verilog-to-routing;

· soheilshahrouz opened on Apr 29, 2025

[WIP] Router Lookahead Profiler

buildBuild systemBuild system

external_libs

infraProject InfrastructureProject Infrastructure

lang-cppC/C++ codeC/C++ code

lang-makeCMake/Make codeCMake/Make code

lang-pythonPython codePython code

scriptsUtility & Infrastructure scriptsUtility & Infrastructure scripts

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Draft (not ready).

verilog-to-routing/vtr-verilog-to-routingnumber 2683

#2683 In verilog-to-routing/vtr-verilog-to-routing;

· nedsels opened on Aug 12, 2024

Congestion Aware Placement

lang-cppC/C++ codeC/C++ code

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Draft (not ready).

verilog-to-routing/vtr-verilog-to-routingnumber 2672

#2672 In verilog-to-routing/vtr-verilog-to-routing;

· behzadmehmood-rs opened on Aug 1, 2024

Merge master to openfpga feature branch

buildBuild systemBuild system

docsDocumentationDocumentation

external_libs

infraProject InfrastructureProject Infrastructure

lang-cppC/C++ codeC/C++ code

lang-makeCMake/Make codeCMake/Make code

libarchfpgaLibrary for handling FPGA Architecture descriptionsLibrary for handling FPGA Architecture descriptions

libvtrutil

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 2572

#2572 In verilog-to-routing/vtr-verilog-to-routing;

· Tulong4Dev opened on May 30, 2024

WIP: Subtraction Fix in ODIN

lang-cppC/C++ codeC/C++ code

OdinOdin II Logic Synthesis Tool: Unsorted itemOdin II Logic Synthesis Tool: Unsorted item

Parmys

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 2307

#2307 In verilog-to-routing/vtr-verilog-to-routing;

· navidjafarof opened on May 8, 2023

[WIP] Tileable Routing Resource Graph Builder

buildBuild systemBuild system

docsDocumentationDocumentation

external_libs

infraProject InfrastructureProject Infrastructure

lang-cppC/C++ codeC/C++ code

lang-hdlHardware Description Language (Verilog/VHDL)Hardware Description Language (Verilog/VHDL)

lang-makeCMake/Make codeCMake/Make code

lang-netlist

lang-pythonPython codePython code

lang-shellShell scripts (bash etc.)Shell scripts (bash etc.)

libarchfpgaLibrary for handling FPGA Architecture descriptionsLibrary for handling FPGA Architecture descriptions

liblog

libpugiutil

libvtrutil

OdinOdin II Logic Synthesis Tool: Unsorted itemOdin II Logic Synthesis Tool: Unsorted item

Parmys

scriptsUtility & Infrastructure scriptsUtility & Infrastructure scripts

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 2135

#2135 In verilog-to-routing/vtr-verilog-to-routing;

· tangxifan opened on Aug 16, 2022