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loopfilter_sse.asm
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; Copyright © 2018-2021, VideoLAN and dav1d authors
; Copyright © 2018, Two Orioles, LLC
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
; ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
%include "config.asm"
%include "ext/x86/x86inc.asm"
SECTION_RODATA 16
pb_4x0_4x4_4x8_4x12: db 0, 0, 0, 0, 4, 4, 4, 4, 8, 8, 8, 8, 12, 12, 12, 12
pb_7_1: times 8 db 7, 1
pb_3_1: times 8 db 3, 1
pb_2_1: times 8 db 2, 1
pb_m1_0: times 8 db -1, 0
pb_m1_1: times 8 db -1, 1
pb_m1_2: times 8 db -1, 2
pb_1: times 16 db 1
pb_2: times 16 db 2
pb_3: times 16 db 3
pb_4: times 16 db 4
pb_16: times 16 db 16
pb_63: times 16 db 63
pb_64: times 16 db 64
pb_128: times 16 db 0x80
pb_129: times 16 db 0x81
pb_240: times 16 db 0xf0
pb_248: times 16 db 0xf8
pb_254: times 16 db 0xfe
pw_2048: times 8 dw 2048
pw_4096: times 8 dw 4096
pd_mask: dd 1, 2, 4, 8
SECTION .text
%macro ABSSUB 4 ; dst, a, b, tmp
psubusb %1, %2, %3
psubusb %4, %3, %2
por %1, %4
%endmacro
%macro TRANSPOSE_16x4_AND_WRITE_4x16 5
; transpose 16x4
punpcklbw m%5, m%1, m%2
punpckhbw m%1, m%2
punpcklbw m%2, m%3, m%4
punpckhbw m%3, m%4
punpcklwd m%4, m%5, m%2
punpckhwd m%5, m%2
punpcklwd m%2, m%1, m%3
punpckhwd m%1, m%3
; write out
%assign %%n 0
%rep 4
movd [dstq+strideq *0-2], xm%4
movd [dstq+strideq *4-2], xm%5
movd [dstq+strideq *8-2], xm%2
movd [dstq+stride3q*4-2], xm%1
add dstq, strideq
%if %%n < 3
psrldq xm%4, 4
psrldq xm%5, 4
psrldq xm%2, 4
psrldq xm%1, 4
%endif
%assign %%n (%%n+1)
%endrep
lea dstq, [dstq+stride3q*4]
%endmacro
%macro TRANSPOSE_16X16B 2 ; output_transpose, mem
%if %1 == 0
mova %2, m15 ; m7 in 32-bit
%endif
; input in m0-7
punpcklbw m15, m0, m1
punpckhbw m0, m1
punpcklbw m1, m2, m3
punpckhbw m2, m3
punpcklbw m3, m4, m5
punpckhbw m4, m5
%if ARCH_X86_64
SWAP 4, 5, 7
%else
%if %1 == 0
mova m5, %2
%else
mova m5, [esp+1*16]
%endif
mova %2, m4
%endif
punpcklbw m4, m6, m5
punpckhbw m6, m5
; interleaved in m15,0,1,2,3,7,4,6
punpcklwd m5, m15, m1
punpckhwd m15, m1
punpcklwd m1, m0, m2
punpckhwd m0, m2
punpcklwd m2, m3, m4
punpckhwd m3, m4
%if ARCH_X86_64
SWAP 3, 4, 7
%else
mova m4, %2
mova %2, m3
%endif
punpcklwd m3, m4, m6
punpckhwd m4, m6
; interleaved in m5,15,1,0,2,7,3,4
punpckldq m6, m5, m2
punpckhdq m5, m2
%if ARCH_X86_64
SWAP 2, 7, 5
%else
mova m2, %2
mova [esp+1*16], m5
%endif
punpckldq m5, m15, m2
punpckhdq m15, m2
punpckldq m2, m1, m3
punpckhdq m1, m3
punpckldq m3, m0, m4
punpckhdq m0, m4
%if ARCH_X86_32
mova [esp+0*16], m6
mova [esp+2*16], m5
mova [esp+3*16], m15
mova [esp+4*16], m2
mova [esp+5*16], m1
mova [esp+6*16], m3
mova [esp+7*16], m0
mova m8, [esp+ 8*16]
mova m9, [esp+ 9*16]
mova m10, [esp+10*16]
%if %1 == 0
mova m11, [esp+11*16]
mova m12, [esp+12*16]
mova m13, [esp+13*16]
mova m14, [esp+14*16]
%else
mova m11, [esp+20*16]
mova m12, [esp+15*16]
mova m13, [esp+16*16]
mova m14, [esp+17*16]
%endif
%endif
; input in m8-m15
%if ARCH_X86_64
SWAP 7, 4
%endif
punpcklbw m7, m8, m9
punpckhbw m8, m9
punpcklbw m9, m10, m11
punpckhbw m10, m11
punpcklbw m11, m12, m13
punpckhbw m12, m13
%if ARCH_X86_64
mova m13, %2
%else
%if %1 == 0
mova m13, [esp+15*16]
%else
mova m13, [esp+18*16]
%endif
%endif
mova %2, m12
punpcklbw m12, m14, m13
punpckhbw m14, m14, m13
; interleaved in m7,8,9,10,11,rsp%2,12,14
punpcklwd m13, m7, m9
punpckhwd m7, m9
punpcklwd m9, m8, m10
punpckhwd m8, m10
punpcklwd m10, m11, m12
punpckhwd m11, m12
mova m12, %2
mova %2, m11
punpcklwd m11, m12, m14
punpckhwd m12, m14
; interleaved in m13,7,9,8,10,rsp%2,11,12
punpckldq m14, m13, m10
punpckhdq m13, m10
punpckldq m10, m9, m11
punpckhdq m9, m11
punpckldq m11, m8, m12
punpckhdq m8, m12
mova m12, %2
mova %2, m8
punpckldq m8, m7, m12
punpckhdq m7, m12
%if ARCH_X86_32
mova [esp+ 8*16], m10
mova [esp+ 9*16], m9
mova [esp+10*16], m11
SWAP 6, 1
SWAP 4, 2
SWAP 5, 3
mova m6, [esp+0*16]
mova m4, [esp+1*16]
mova m5, [esp+2*16]
%endif
; interleaved in m6,7,5,15,2,1,3,0,14,13,10,9,11,rsp%2,8,7
punpcklqdq m12, m6, m14
punpckhqdq m6, m14
punpcklqdq m14, m4, m13
punpckhqdq m4, m13
punpcklqdq m13, m5, m8
punpckhqdq m5, m8
%if ARCH_X86_64
SWAP 8, 5
%else
mova m8, [esp+3*16]
mova [esp+27*16], m5
%define m15 m8
%endif
punpcklqdq m5, m15, m7
punpckhqdq m15, m7
%if ARCH_X86_32
mova [esp+11*16], m12
mova [esp+12*16], m6
mova [esp+13*16], m14
mova [esp+14*16], m4
mova [esp+26*16], m13
mova [esp+ 0*16], m5
mova [esp+ 1*16], m15
mova m2, [esp+ 4*16]
mova m10, [esp+ 8*16]
mova m1, [esp+ 5*16]
mova m9, [esp+ 9*16]
mova m3, [esp+ 6*16]
mova m11, [esp+10*16]
mova m0, [esp+ 7*16]
%endif
punpcklqdq m7, m2, m10
punpckhqdq m2, m10
punpcklqdq m10, m1, m9
punpckhqdq m1, m9
punpcklqdq m9, m3, m11
punpckhqdq m3, m11
mova m11, %2
%if ARCH_X86_32
%define m12 m3
%endif
mova %2, m12
punpcklqdq m12, m0, m11
punpckhqdq m0, m11
%if %1 == 1
mova m11, %2
%endif
%if ARCH_X86_64
; interleaved m11,6,14,4,13,8,5,15,7,2,10,1,9,3,12,0
SWAP 0, 11, 1, 6, 5, 8, 7, 15
SWAP 2, 14, 12, 9
SWAP 3, 4, 13
%else
%if %1 == 0
mova [esp+15*16], m9
mova [esp+17*16], m12
mova [esp+18*16], m0
mova [esp+28*16], m10
mova [esp+29*16], m1
mova m3, [esp+0*16]
mova m4, [esp+1*16]
SWAP m5, m7
SWAP m6, m2
%else
SWAP 0, 7
SWAP 3, 1, 2, 4, 6
%endif
%endif
%endmacro
%macro FILTER 2 ; width [4/6/8/16], dir [h/v]
%if ARCH_X86_64
%define %%flat8mem [rsp+0*16]
%define %%q2mem [rsp+1*16]
%define %%q3mem [rsp+2*16]
%else
%if %1 == 4 || %1 == 6
%define %%p2mem [esp+ 8*16]
%define %%q2mem [esp+ 9*16]
%define %%flat8mem [esp+10*16]
%else
%ifidn %2, v
%define %%p2mem [esp+16*16]
%define %%q2mem [esp+ 1*16]
%define %%q3mem [esp+18*16]
%define %%flat8mem [esp+ 0*16]
%define %%flat16mem [esp+20*16]
%else
%define %%p2mem [esp+27*16]
%define %%q2mem [esp+28*16]
%define %%q3mem [esp+29*16]
%define %%flat8mem [esp+21*16]
%define %%flat16mem [esp+30*16]
%endif
%endif
%xdefine m12reg m12
%endif
%if ARCH_X86_32
lea stride3q, [strideq*3]
%endif
; load data
%ifidn %2, v
%if ARCH_X86_32
mov mstrideq, strideq
neg mstrideq
%endif
%if %1 == 4
lea tmpq, [dstq+mstrideq*2]
mova m3, [tmpq+strideq*0] ; p1
mova m4, [tmpq+strideq*1] ; p0
mova m5, [tmpq+strideq*2] ; q0
mova m6, [tmpq+stride3q] ; q1
%else
; load 6-8 pixels, remainder (for wd=16) will be read inline
lea tmpq, [dstq+mstrideq*4]
; we load p3 later
%define %%p3mem [dstq+mstrideq*4]
%if ARCH_X86_32
%define m13 m0
%define m14 m1
%define m15 m2
%endif
mova m13, [tmpq+strideq*1]
mova m3, [tmpq+strideq*2]
mova m4, [tmpq+stride3q]
mova m5, [dstq+strideq*0]
mova m6, [dstq+strideq*1]
mova m14, [dstq+strideq*2]
%if %1 != 6
mova m15, [dstq+stride3q]
%endif
%if ARCH_X86_32
mova %%p2mem, m13
mova %%q2mem, m14
%define m13 %%p2mem
%define m14 %%q2mem
%if %1 != 6
mova %%q3mem, m15
%define m15 %%q3mem
%endif
%endif
%endif
%else ; %2 == h
; load lines
%if %1 == 4
; transpose 4x16
movd m7, [dstq+strideq*0-2]
movd m3, [dstq+strideq*1-2]
movd m4, [dstq+strideq*2-2]
movd m5, [dstq+stride3q -2]
lea tmpq, [dstq+strideq*4]
punpcklbw m7, m3
punpcklbw m4, m5
movd m3, [tmpq+strideq*0-2]
movd m1, [tmpq+strideq*1-2]
movd m5, [tmpq+strideq*2-2]
movd m6, [tmpq+stride3q -2]
lea tmpq, [tmpq+strideq*4]
punpcklbw m3, m1
punpcklbw m5, m6
movd m0, [tmpq+strideq*0-2]
movd m1, [tmpq+strideq*1-2]
punpcklbw m0, m1
movd m1, [tmpq+strideq*2-2]
movd m2, [tmpq+stride3q -2]
punpcklbw m1, m2
punpcklqdq m7, m0
punpcklqdq m4, m1
lea tmpq, [tmpq+strideq*4]
movd m0, [tmpq+strideq*0-2]
movd m1, [tmpq+strideq*1-2]
punpcklbw m0, m1
movd m1, [tmpq+strideq*2-2]
movd m2, [tmpq+stride3q -2]
punpcklbw m1, m2
punpcklqdq m3, m0
punpcklqdq m5, m1
; xm7: A0-1,B0-1,C0-1,D0-1,A8-9,B8-9,C8-9,D8-9
; xm3: A4-5,B4-5,C4-5,D4-5,A12-13,B12-13,C12-13,D12-13
; xm4: A2-3,B2-3,C2-3,D2-3,A10-11,B10-11,C10-11,D10-11
; xm5: A6-7,B6-7,C6-7,D6-7,A14-15,B14-15,C14-15,D14-15
punpcklwd m6, m7, m4
punpckhwd m7, m4
punpcklwd m4, m3, m5
punpckhwd m3, m5
; xm6: A0-3,B0-3,C0-3,D0-3
; xm7: A8-11,B8-11,C8-11,D8-11
; xm4: A4-7,B4-7,C4-7,D4-7
; xm3: A12-15,B12-15,C12-15,D12-15
punpckldq m5, m6, m4
punpckhdq m6, m4
punpckldq m4, m7, m3
punpckhdq m7, m3
; xm5: A0-7,B0-7
; xm6: C0-7,D0-7
; xm4: A8-15,B8-15
; xm7: C8-15,D8-15
punpcklqdq m3, m5, m4
punpckhqdq m5, m5, m4
punpcklqdq m4, m6, m7
punpckhqdq m6, m7
; xm3: A0-15
; xm5: B0-15
; xm4: C0-15
; xm6: D0-15
SWAP 4, 5
%elif %1 == 6 || %1 == 8
; transpose 8x16
movq m7, [dstq+strideq*0-%1/2]
movq m3, [dstq+strideq*1-%1/2]
movq m4, [dstq+strideq*2-%1/2]
movq m5, [dstq+stride3q -%1/2]
lea tmpq, [dstq+strideq*8]
punpcklbw m7, m3
punpcklbw m4, m5
movq m3, [tmpq+strideq*0-%1/2]
movq m1, [tmpq+strideq*1-%1/2]
movq m5, [tmpq+strideq*2-%1/2]
movq m6, [tmpq+stride3q -%1/2]
lea tmpq, [dstq+strideq*4]
punpcklbw m3, m1
punpcklbw m5, m6
movq m6, [tmpq+strideq*0-%1/2]
movq m0, [tmpq+strideq*1-%1/2]
movq m1, [tmpq+strideq*2-%1/2]
movq m2, [tmpq+stride3q -%1/2]
lea tmpq, [tmpq+strideq*8]
punpcklbw m6, m0
punpcklbw m1, m2
movq m2, [tmpq+strideq*2-%1/2]
movq m0, [tmpq+stride3q -%1/2]
punpcklbw m2, m0
%if ARCH_X86_64
SWAP m15, m2
%else
%define m15 [esp+3*16]
mova m15, m2
%endif
movq m0, [tmpq+strideq*0-%1/2]
movq m2, [tmpq+strideq*1-%1/2]
punpcklbw m0, m2
; xm7: A0-1,B0-1,C0-1,D0-1,E0-1,F0-1,G0-1,H0-1
; xm3: A8-9,B8-9,C8-9,D8-9,E8-9,F8-9,G8-9,H8-9
; xm4: A2-3,B2-3,C2-3,D2-3,E2-3,F2-3,G2-3,H2-3
; xm5: A10-11,B10-11,C10-11,D10-11,E10-11,F10-11,G10-11,H10-11
; xm6: A4-5,B4-5,C4-5,D4-5,E4-5,F4-5,G4-5,H4-5
; xm0: A12-13,B12-13,C12-13,D12-13,E12-13,F12-13,G12-13,H12-13
; xm1: A6-7,B6-7,C6-7,D6-7,E6-7,F6-7,G6-7,H6-7
; xm2: A14-15,B14-15,C14-15,D14-15,E14-15,F14-15,G14-15,H14-15
punpcklwd m2, m7, m4
punpckhwd m7, m4
punpcklwd m4, m3, m5
punpckhwd m3, m5
punpcklwd m5, m6, m1
punpckhwd m6, m1
punpcklwd m1, m0, m15
punpckhwd m0, m15
%if ARCH_X86_64
SWAP m15, m0
%else
mova m15, m0
%endif
; xm2: A0-3,B0-3,C0-3,D0-3
; xm7: E0-3,F0-3,G0-3,H0-3
; xm4: A8-11,B8-11,C8-11,D8-11
; xm3: E8-11,F8-11,G8-11,H8-11
; xm5: A4-7,B4-7,C4-7,D4-7
; xm6: E4-7,F4-7,G4-7,H4-7
; xm1: A12-15,B12-15,C12-15,D12-15
; xm0: E12-15,F12-15,G12-15,H12-15
punpckldq m0, m2, m5
punpckhdq m2, m5
punpckldq m5, m7, m6
%if %1 != 6
punpckhdq m7, m6
%endif
punpckldq m6, m4, m1
punpckhdq m4, m1
punpckldq m1, m3, m15
%if %1 != 6
punpckhdq m3, m15
%if ARCH_X86_64
SWAP m15, m3
%else
mova m15, m3
%endif
%endif
; xm0: A0-7,B0-7
; xm2: C0-7,D0-7
; xm5: E0-7,F0-7
; xm7: G0-7,H0-7
; xm6: A8-15,B8-15
; xm4: C8-15,D8-15
; xm1: E8-15,F8-15
; xm3: G8-15,H8-15
punpcklqdq m3, m0, m6
punpckhqdq m0, m6
punpckhqdq m6, m2, m4
punpcklqdq m2, m4
punpcklqdq m4, m5, m1
punpckhqdq m5, m1
%if %1 == 8
punpcklqdq m1, m7, m15
punpckhqdq m7, m15
; xm3: A0-15
; xm0: B0-15
; xm2: C0-15
; xm6: D0-15
; xm4: E0-15
; xm5: F0-15
; xm1: G0-15
; xm7: H0-15
%if ARCH_X86_64
SWAP 11, 3, 2
SWAP 13, 0
SWAP 6, 5, 4
SWAP 14, 1
SWAP 15, 7
; 3,0,2,6,4,5,1,7 -> 11,13,3,4,5,6,14,15
mova [rsp+21*16], m11
%define %%p3mem [rsp+21*16]
%else
%define m11 [esp+26*16]
%define m13 [esp+27*16]
%define m14 [esp+28*16]
%define m15 [esp+29*16]
mova m11, m3
mova m13, m0
SWAP 3, 2
SWAP 6, 5, 4
mova m14, m1
mova m15, m7
%define %%p3mem [esp+26*16]
%endif
%else
%if ARCH_X86_64
SWAP 13, 3, 0
SWAP 14, 5, 6, 4, 2
; 3,0,2,6,4,5 -> 13,3,4,5,6,14
%else
%define m13 %%p2mem
%define m14 %%q2mem
mova m13, m3
mova m14, m5
SWAP 3, 0
SWAP 5, 6, 4, 2
; 0,2,6,4 -> 3,4,5,6
%endif
%endif
%else
%if ARCH_X86_64
mova [rsp+20*16], m12
%endif
; load and 16x16 transpose. We only use 14 pixels but we'll need the
; remainder at the end for the second transpose
%if ARCH_X86_32
%xdefine m8 m0
%xdefine m9 m1
%xdefine m10 m2
%xdefine m11 m3
%xdefine m12 m4
%xdefine m13 m5
%xdefine m14 m6
%xdefine m15 m7
lea tmpq, [dstq+strideq*8]
movu m8, [tmpq+strideq*0-8]
movu m9, [tmpq+strideq*1-8]
movu m10, [tmpq+strideq*2-8]
movu m11, [tmpq+stride3q -8]
lea tmpq, [tmpq+strideq*4]
movu m12, [tmpq+strideq*0-8]
movu m13, [tmpq+strideq*1-8]
movu m14, [tmpq+strideq*2-8]
movu m15, [tmpq+stride3q -8]
mova [esp+ 8*16], m8
mova [esp+ 9*16], m9
mova [esp+10*16], m10
mova [esp+11*16], m11
mova [esp+12*16], m12
mova [esp+13*16], m13
mova [esp+14*16], m14
mova [esp+15*16], m15
%endif
movu m0, [dstq+strideq*0-8]
movu m1, [dstq+strideq*1-8]
movu m2, [dstq+strideq*2-8]
movu m3, [dstq+stride3q -8]
lea tmpq, [dstq+strideq*4]
movu m4, [tmpq+strideq*0-8]
movu m5, [tmpq+strideq*1-8]
movu m6, [tmpq+strideq*2-8]
movu m7, [tmpq+stride3q -8]
lea tmpq, [tmpq+strideq*4]
%if ARCH_X86_64
movu m8, [tmpq+strideq*0-8]
movu m9, [tmpq+strideq*1-8]
movu m10, [tmpq+strideq*2-8]
movu m11, [tmpq+stride3q -8]
lea tmpq, [tmpq+strideq*4]
movu m12, [tmpq+strideq*0-8]
movu m13, [tmpq+strideq*1-8]
movu m14, [tmpq+strideq*2-8]
movu m15, [tmpq+stride3q -8]
%endif
%if ARCH_X86_64
TRANSPOSE_16X16B 0, [rsp+11*16]
mova [rsp+12*16], m1
mova [rsp+13*16], m2
mova [rsp+14*16], m3
mova [rsp+15*16], m12
mova [rsp+16*16], m13
mova [rsp+17*16], m14
mova [rsp+18*16], m15
; 4,5,6,7,8,9,10,11 -> 12,13,3,4,5,6,14,15
SWAP 12, 4, 7
SWAP 13, 5, 8
SWAP 3, 6, 9
SWAP 10, 14
SWAP 11, 15
mova [rsp+21*16], m12
%define %%p3mem [rsp+21*16]
mova m12, [rsp+20*16]
%else
TRANSPOSE_16X16B 0, [esp+16*16]
%define %%p3mem [esp+26*16]
%define m11 %%p3mem
%define m13 %%p2mem
%define m14 %%q2mem
%define m15 %%q3mem
%endif
%endif ; if 4 elif 6 or 8 else 16
%endif ; if v else h
; load L/E/I/H
%if ARCH_X86_32
mov l_strideq, l_stridem
%endif
%ifidn %2, v
movu m1, [lq]
movu m0, [lq+l_strideq]
%else
%if ARCH_X86_32
lea l_stride3q, [l_strideq*3]
%endif
movq xm1, [lq]
movq xm2, [lq+l_strideq*2]
movhps xm1, [lq+l_strideq]
movhps xm2, [lq+l_stride3q]
shufps m0, m1, m2, q3131
shufps m1, m2, q2020
%if ARCH_X86_32
lea stride3q, [strideq*3]
%endif
%endif
%if ARCH_X86_32
%ifidn %2, v
mov lutd, lutm
%endif
%endif
pxor m2, m2
pcmpeqb m7, m2, m0
pand m1, m7
por m0, m1 ; l[x][] ? l[x][] : l[x-stride][]
pshufb m0, [PIC_sym(pb_4x0_4x4_4x8_4x12)] ; l[x][1]
pcmpeqb m2, m0 ; !L
psrlq m7, m0, [lutq+128]
pand m7, [PIC_sym(pb_63)]
pminub m7, minlvl
pmaxub m7, [PIC_sym(pb_1)] ; I
pand m1, m0, [PIC_sym(pb_240)]
psrlq m1, 4 ; H
paddb m0, [PIC_sym(pb_2)]
paddb m0, m0
paddb m0, m7 ; E
pxor m1, [PIC_sym(pb_128)]
pxor m7, [PIC_sym(pb_128)]
pxor m0, [PIC_sym(pb_128)]
SWAP 2, 7
%if ARCH_X86_64
SWAP 0, 8
SWAP 2, 10
%else
%ifidn %2, v
mov mstrideq, strideq
neg mstrideq
%if %1 == 4
lea tmpq, [dstq+mstrideq*2]
%elif %1 == 6 || %1 == 8
lea tmpq, [dstq+mstrideq*4]
%endif
%endif
mova [esp+3*16], m0
mova [esp+4*16], m2
%endif
ABSSUB m0, m3, m4, m2 ; abs(p1-p0)
pmaxub m0, m7
ABSSUB m2, m5, m6, m7 ; abs(q1-q0)
pmaxub m0, m2
%if %1 == 4
pxor m0, [PIC_sym(pb_128)]
pcmpgtb m7, m0, m1 ; hev
%if ARCH_X86_64
SWAP 7, 11
%else
mova [esp+5*16], m7
%endif
%else
pxor m7, m0, [PIC_sym(pb_128)]
pcmpgtb m7, m1 ; hev
%if ARCH_X86_64
SWAP 7, 11
%else
mova [esp+5*16], m7
%endif
%if %1 == 6
ABSSUB m1, m13, m4, m7 ; abs(p2-p0)
pmaxub m1, m0
%else
mova m2, %%p3mem
ABSSUB m1, m2, m4, m7 ; abs(p3-p0)
pmaxub m1, m0
ABSSUB m7, m13, m4, m2 ; abs(p2-p0)
pmaxub m1, m7
%endif
ABSSUB m7, m5, m14, m2 ; abs(p2-p0)
pmaxub m1, m7
%if %1 != 6
ABSSUB m7, m5, m15, m2 ; abs(q3-q0)
pmaxub m1, m7
%endif
pxor m1, [PIC_sym(pb_128)]
pcmpgtb m1, [PIC_sym(pb_129)] ; !flat8in
%if ARCH_X86_64
SWAP 1, 9
%else
mova [esp+6*16], m1
%endif
%if %1 == 6
ABSSUB m7, m13, m3, m1 ; abs(p2-p1)
%else
mova m2, %%p3mem
ABSSUB m7, m2, m13, m1 ; abs(p3-p2)
ABSSUB m2, m13, m3, m1 ; abs(p2-p1)
pmaxub m7, m2
ABSSUB m2, m14, m15, m1 ; abs(q3-q2)
pmaxub m7, m2
%endif
ABSSUB m2, m14, m6, m1 ; abs(q2-q1)
pmaxub m7, m2
%if ARCH_X86_32
%define m12 m1
mova m12, maskmem
%endif
pand m2, m12, mask1
pcmpeqd m2, m12
pand m7, m2 ; only apply fm-wide to wd>4 blocks
pmaxub m0, m7
pxor m0, [PIC_sym(pb_128)]
%endif ; %if %1 == 4 else
%if ARCH_X86_64
SWAP 2, 10
pcmpgtb m0, m2
%else
pcmpgtb m0, [esp+4*16]
%endif
ABSSUB m1, m3, m6, m7 ; abs(p1-q1)
ABSSUB m7, m4, m5, m2 ; abs(p0-q0)
paddusb m7, m7
pand m1, [PIC_sym(pb_254)]
psrlq m1, 1
paddusb m1, m7 ; abs(p0-q0)*2+(abs(p1-q1)>>1)
pxor m1, [PIC_sym(pb_128)]
%if ARCH_X86_64
pcmpgtb m1, m8 ; abs(p0-q0)*2+(abs(p1-q1)>>1) > E
%else
pcmpgtb m1, [esp+3*16]
%endif
por m0, m1
%if %1 == 16
%if ARCH_X86_64
SWAP 0, 8
%else
mova [esp+3*16], m0
%endif
%ifidn %2, v
lea tmpq, [dstq+mstrideq*8]
mova m0, [tmpq+strideq*1]
%else
mova m0, [rsp+12*16]
%endif
ABSSUB m1, m0, m4, m2
%ifidn %2, v
mova m0, [tmpq+strideq*2]
%else
mova m0, [rsp+13*16]
%endif
ABSSUB m2, m0, m4, m7
pmaxub m1, m2
%ifidn %2, v
mova m0, [tmpq+stride3q]
%else
mova m0, [rsp+14*16]
%endif
ABSSUB m2, m0, m4, m7
pmaxub m1, m2
%ifidn %2, v
lea tmpq, [dstq+strideq*4]
mova m0, [tmpq+strideq*0]
%else
mova m0, [rsp+15*16]
%endif
ABSSUB m2, m0, m5, m7
pmaxub m1, m2
%ifidn %2, v
mova m0, [tmpq+strideq*1]
%else
mova m0, [rsp+16*16]
%endif
ABSSUB m2, m0, m5, m7
pmaxub m1, m2
%ifidn %2, v
mova m0, [tmpq+strideq*2]
%else
mova m0, [rsp+17*16]
%endif
ABSSUB m2, m0, m5, m7
pmaxub m1, m2
pxor m1, [PIC_sym(pb_128)]
pcmpgtb m1, [PIC_sym(pb_129)] ; !flat8out
%if ARCH_X86_64
por m1, m9 ; !flat8in | !flat8out
%else
por m1, [esp+6*16]
%define m12 m7
mova m12, maskmem
%endif
pand m2, m12, mask2
pcmpeqd m2, m12
pandn m1, m2 ; flat16
%if ARCH_X86_64
pandn m2, m8, m1 ; flat16 & fm
%else
pandn m2, [esp+3*16], m1 ; flat16 & fm
mova %%flat16mem, m2
%endif
SWAP 1, 2
pand m2, m12, mask1
pcmpeqd m2, m12
%if ARCH_X86_64
pandn m9, m2 ; flat8in
pandn m2, m8, m9
SWAP 2, 9
%else
pandn m0, [esp+6*16], m2
pandn m2, [esp+3*16], m0
mova [esp+6*16], m2
%endif
pand m2, m12, mask0
pcmpeqd m2, m12
%if ARCH_X86_64
pandn m8, m2
pandn m2, m9, m8 ; fm & !flat8 & !flat16
SWAP 2, 8
pandn m2, m1, m9 ; flat8 & !flat16
SWAP 2, 9
SWAP 0, 8
SWAP 1, 10
%else
pandn m0, [esp+3*16], m2
pandn m2, [esp+6*16], m0
SWAP 2, 0
pandn m2, m1, [esp+6*16]
mova %%flat8mem, m2
%endif
%elif %1 != 4
%if ARCH_X86_64
SWAP 1, 9
%else
%define m12 m7
mova m12, maskmem
mova m1, [esp+6*16]
%endif
pand m2, m12, mask1
pcmpeqd m2, m12
pandn m1, m2
pandn m2, m0, m1 ; flat8 & fm
pand m1, m12, mask0
pcmpeqd m1, m12
pandn m0, m1
pandn m1, m2, m0 ; fm & !flat8
SWAP 1, 2, 0
%if ARCH_X86_64
SWAP 1, 9
%else
mova %%flat8mem, m1
%endif
%else
%if ARCH_X86_32
%define m12 m1
mova m12, maskmem
%endif
pand m2, m12, mask0
pcmpeqd m2, m12
pandn m0, m2 ; fm
%endif
; short filter
mova m1, [PIC_sym(pb_128)]
%if ARCH_X86_64
SWAP 7, 11
%else
mova m7, [esp+5*16]
%endif
pxor m3, m1
pxor m6, m1
pxor m4, m1
pxor m5, m1
psubsb m1, m3, m6 ; iclip_diff(p1-q1)
pand m1, m7 ; f=iclip_diff(p1-q1)&hev
psubsb m2, m5, m4
paddsb m1, m2
paddsb m1, m2
paddsb m1, m2 ; f=iclip_diff(3*(q0-p0)+f)
mova m2, [PIC_sym(pb_16)]
pand m0, m1 ; f&=fm
paddsb m1, m0, [PIC_sym(pb_3)]
paddsb m0, [PIC_sym(pb_4)]
pand m1, [PIC_sym(pb_248)]
pand m0, [PIC_sym(pb_248)]
psrlq m1, 3
psrlq m0, 3
pxor m1, m2
pxor m0, m2
psubb m1, m2 ; f2
psubb m0, m2 ; f1
mova m2, [PIC_sym(pb_128)]
paddsb m4, m1
psubsb m5, m0
pxor m4, m2
pxor m5, m2
pxor m0, m2
pxor m1, m1
pavgb m0, m1 ; f=(f1+1)>>1
psubb m0, [PIC_sym(pb_64)]
pandn m7, m0 ; f&=!hev
paddsb m3, m7
psubsb m6, m7
pxor m3, m2
pxor m6, m2