riscv/nuttsbi: add MTVAL argument

yf13 · yf13 · commit bc8a4e442eb1 · 2024-06-23T15:43:23.000+08:00
The MTVAL and the other two provides a complete exception story.

Signed-off-by: Yanfeng Liu &lt;yfliu2008@qq.com&gt;
diff --git a/arch/risc-v/src/nuttsbi/sbi_mexception.c b/arch/risc-v/src/nuttsbi/sbi_mexception.c
@@ -30,8 +30,9 @@
  * Public Functions
  ****************************************************************************/
 
-void sbi_mexception(uintptr_t mcause, uintptr_t *mepc)
+void sbi_mexception(uintreg_t mcause, uintreg_t *mepc, uintreg_t tval)
 {
-  (void) mcause;
-  (void) mepc;
+  UNUSED(mcause);
+  UNUSED(mepc);
+  UNUSED(tval);
 }
diff --git a/arch/risc-v/src/nuttsbi/sbi_mtrap.S b/arch/risc-v/src/nuttsbi/sbi_mtrap.S
@@ -127,6 +127,7 @@ machine_trap:
 
   csrr        a0, CSR_MCAUSE     /* Interrupt cause [arg0] */
   csrr        a1, CSR_MEPC       /* Interrupt PC (instruction) [arg1] */
+  csrr        a2, CSR_MTVAL      /* The MTVAL value [arg2] */
   jal         x1, sbi_mexception
   j           __start
 

Original file line number	Diff line number	Diff line change
`@@ -30,8 +30,9 @@`
`30`	`30`	`* Public Functions`
`31`	`31`	`****************************************************************************/`
`32`	`32`
`33`		`-void sbi_mexception(uintptr_t mcause, uintptr_t *mepc)`
	`33`	`+void sbi_mexception(uintreg_t mcause, uintreg_t *mepc, uintreg_t tval)`
`34`	`34`	`{`
`35`		`- (void) mcause;`
`36`		`- (void) mepc;`
	`35`	`+ UNUSED(mcause);`
	`36`	`+ UNUSED(mepc);`
	`37`	`+ UNUSED(tval);`
`37`	`38`	`}`