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Drivers: DAI: Intel: DMIC: Program start symmetrically for PDMx
This change is assumed to fix the random corruption of 4ch capture for PDM1 channels 3-4 in PTL platform. There are no solid facts behind this change but assumption that PDMx controllers are not in sync if the start sequence for PDM1 is further away from PDM0. The PDM0 internal state may be different from PDM1 The single for loop to handle the CIC and FIR start sequence is split into two for loops to handle same registers update tasks symmetrically for all stereo PDM controllers. E.g. two PDMs for four microphones. First loop programs the CIC_CONTROL and MIC_CONTROL registers of the PDMx controllers. These features belong to the CIC block in DMIC IP. Second loop programs the FIR_CONTROL registers of the PDMx controllers. In a stress test of 100 times repeated commands: arecord -Dhw:0,6 -fS32_LE -r48000 -c4 -d 10 dmic_test_1.wav; \ sleep 0.5; \ arecord -Dhw:0,6 -fS32_LE -r48000 -c4 -d 10 dmic_test_2.wav; \ sleep 1 The corruption occurrence with xt-clang build was e.g. 87/200 fails in one of wav files giving 43.5% occurrence. The test was done with Zephyr commit fe29c40 ("llext: add inspection API test suite"). In a gcc build the occurrence of corruption is lower, around 6% but it is seen that the channels 3-4 pdm1 are swapping randomly. With this fix the corruption occurred zero times in xt-clang and gcc builds with same 100 repeats. Signed-off-by: Seppo Ingalsuo <[email protected]>
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