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boards: adi: Add MAX32660EVSYS board
This commit adds MAX32660EVSYS board basic port. Signed-off-by: Yasin Ustuner <[email protected]> Signed-off-by: Matthew McClintock <[email protected]>
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# MAX32660EVSYS boards configuration
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# Copyright (c) 2025 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_MAX32660EVSYS
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select SOC_MAX32660

boards/adi/max32660evsys/board.cmake

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# Copyright (c) 2025 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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include(${ZEPHYR_BASE}/boards/common/openocd-adi-max32.boards.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/adi/max32660evsys/board.yml

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# Copyright (c) 2025 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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board:
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name: max32660evsys
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full_name: MAX32660EVSYS
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vendor: adi
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socs:
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- name: max32660
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.. zephyr:board:: max32660evsys
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Overview
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********
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The MAX32660 evaluation system offers a compact development platform that
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provides access to all the features of the MAX32660 in a tiny, easy to
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use board. A MAX32625PICO-based debug adapter comes attached to the main
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board. It can be snapped free when programming is complete. The debug
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module supports an optional 10-pin Arm® Cortex® debug connector for DAPLink
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functionality. Combined measurements are 0.65in x 2.2in, while the main board
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alone measures 0.65in x 0.95in. External connections terminate in a dual-row
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header footprint compatible with both thru-hole and SMT applications. This
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board provides a powerful processing subsystem in a very small space that
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can be easily integrated into a variety of applications.
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The Zephyr port is running on the MAX32660 MCU.
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Hardware
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********
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- MAX32660 MCU:
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- High-Efficiency Microcontroller for Wearable Devices
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- Internal Oscillator Operates Up to 96MHz
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- 256KB Flash Memory
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- 96KB SRAM, Optionally Preserved in Lowest Power Backup Mode
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- 16KB Instruction Cache
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- Memory Protection Unit (MPU)
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- Low 1.1V VCORE Supply Voltage
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- 3.6V GPIO Operating Range
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- Internal LDO Provides Operation from Single Supply
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- Wide Operating Temperature: -40°C to +105°C
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- Power Management Maximizes Uptime for Battery Applications
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- 85µA/MHz Active Executing from Flash
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- 2µA Full Memory Retention Power in Backup Mode at VDD = 1.8V
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- 450nA Ultra-Low Power RTC at VDD=1.8V
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- Internal 80kHz Ring Oscillator
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- Optimal Peripheral Mix Provides Platform Scalability
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- Up to 14 General-Purpose I/O Pins
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- Up to Two SPI
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- I2S
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- Up to Two UARTs
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- Up to Two I2C, 3.4Mbps High Speed
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- Four-Channel Standard DMA Controller
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- Three 32-Bit Timers
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- Watchdog Timer
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- CMOS-Level 32.768kHz RTC Output
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- Benefits and Features of MAX32660-EVSYS:
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- DIP Breakout Board
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- 100mil Pitch Dual Inline Pin Headers
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- Breadboard Compatible
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- Integrated Peripherals
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- Red Indicator LED
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- User Pushbutton
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- MAX32625PICO-Based Debug Adapter
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- CMSIS-DAP SWD Debugger
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- Virtual UART Console
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Supported Features
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==================
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The ``max32660evsys`` board supports the following interfaces:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| CLOCK | on-chip | clock and reset control |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial |
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+-----------+------------+-------------------------------------+
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Programming and Debugging
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*************************
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Flashing
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========
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An Arm® debug access port (DAP) provides an external interface for debugging during application
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development. The DAP is a standard Arm CoreSight® serial wire debug port, uses a two-pin serial
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interface (SWDCLK and SWDIO), and is accessed through 10-pin header (J4).
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Once the debug probe is connected to your host computer, then you can simply run the
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``west flash`` command to write a firmware image into flash.
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.. note::
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This board uses OpenOCD as the default debug interface. You can also use
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a Segger J-Link with Segger's native tooling by overriding the runner,
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appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
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be connected to the standard 2*5 pin debug connector (J3) using an
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appropriate adapter board and cable.
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Debugging
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=========
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Please refer to the `Flashing`_ section and run the ``west debug`` command
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instead of ``west flash``.
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References
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**********
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- `MAX32660EVSYS web page`_
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.. _MAX32660EVSYS web page:
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https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32660-evsys.html
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/*
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* Copyright (c) 2025 Analog Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <adi/max32/max32660.dtsi>
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#include <adi/max32/max32660-pinctrl.dtsi>
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#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "Analog Devices MAX32660EVSYS";
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compatible = "adi,max32660evsys";
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chosen {
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zephyr,console = &uart1;
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zephyr,shell-uart = &uart1;
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zephyr,sram = &sram2;
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zephyr,flash = &flash0;
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};
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leds {
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compatible = "gpio-leds";
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led1: led_1 {
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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label = "Red LED";
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};
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};
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/* These aliases are provided for compatibility with samples */
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aliases {
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led0 = &led1;
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};
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};
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&uart1 {
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pinctrl-0 = <&uart1_tx_p0_10 &uart1_rx_p0_11>;
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pinctrl-names = "default";
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current-speed = <115200>;
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data-bits = <8>;
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parity = "none";
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status = "okay";
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};
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&clk_ipo {
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status = "okay";
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};
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&gpio0 {
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status = "okay";
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};
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identifier: max32660evsys
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name: max32660evsys
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vendor: adi
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gnuarmemb
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supported:
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- gpio
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- serial
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ram: 96
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flash: 256
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# Copyright (c) 2025 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Enable GPIO
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CONFIG_GPIO=y
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# Console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Enable UART
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y

boards/common/openocd-adi-max32.boards.cmake

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if(CONFIG_SOC_MAX32655_M4)
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set(MAX32_TARGET_CFG "max32655.cfg")
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elseif(CONFIG_SOC_MAX32660)
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set(MAX32_TARGET_CFG "max32660.cfg")
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elseif(CONFIG_SOC_MAX32662)
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set(MAX32_TARGET_CFG "max32662.cfg")
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elseif(CONFIG_SOC_MAX32666)

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