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add spi nand driver #50690

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rogeryou
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This PR is updated for #43915.

Add SPI NAND block device driver for using SPI NAND Flash like Macronix Flash MX31LF4GE4BC.
This driver is tested on STM32L562E-DK.

The license of BCH code is updated.

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Thanks for this contribution.
Some clean up required.
My main request would be to remove STM32 mentions, since there is nothing STM32 specific here aside from the board used for test.

@erwango erwango removed the platform: STM32 ST Micro STM32 label Sep 27, 2022
@carlescufi
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@rogeryou can you please format your commits as described here:
https://docs.zephyrproject.org/latest/contribute/guidelines.html#commit-guidelines

@rogeryou rogeryou force-pushed the macronix_spi_nand_v1 branch from 9755c14 to 901b863 Compare September 28, 2022 03:16
@rogeryou
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@rogeryou can you please format your commits as described here: https://docs.zephyrproject.org/latest/contribute/guidelines.html#commit-guidelines

I have formated my commits.

@Laczen
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Laczen commented Sep 29, 2022

@rogeryou, thank you for this contribution. It would be very nice to have nand flash support in zephyr.

Regarding the PR, I have seen that the ecc is hidden for the user as to be able to use the standard flash interface. This is a good thing, but doesn't this also make any other part of the oob data unavailable ? IMHO it would be good to extend the flash driver for nand flashes with read/write possibilities of the oob data. This would allow adding bad block info to the oob area.

@RyKolb
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RyKolb commented Nov 1, 2022

@rogeryou
It seems as though part of this driver is written for either a 2048 or 4096 page size NAND flash, and yet other parts use the defined page/block offset/mask. Is there reasoning behind this?

@carlescufi carlescufi requested review from Laczen and removed request for GeorgeCGV, gmarull and mbolivar-nordic November 2, 2022 14:12
erwango
erwango previously requested changes Nov 8, 2022
@rogeryou
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@rogeryou, thank you for this contribution. It would be very nice to have nand flash support in zephyr.

Regarding the PR, I have seen that the ecc is hidden for the user as to be able to use the standard flash interface. This is a good thing, but doesn't this also make any other part of the oob data unavailable ? IMHO it would be good to extend the flash driver for nand flashes with read/write possibilities of the oob data. This would allow adding bad block info to the oob area.

Thank you for your suggestion. We will add APIs that operate OOB later.

@rogeryou rogeryou closed this Nov 23, 2022
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@rogeryou It seems as though part of this driver is written for either a 2048 or 4096 page size NAND flash, and yet other parts use the defined page/block offset/mask. Is there reasoning behind this?

Could you tell me which part of the program you mentioned?

@rogeryou rogeryou reopened this Nov 23, 2022
@zephyrbot zephyrbot added the area: Devicetree Binding PR modifies or adds a Device Tree binding label Nov 23, 2022
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The offset used in flash_api_write is Flash physical address. This spi_nand driver was originally designed for Macronix MX35/31 series SPI NAND Flash. For example, we test this driver with Flash EPN MX35LF1GE4BC which has 2KB page size and 64 byte OOB area. And this driver will read ONFI parameter table to get the Flash info like page size, oob size in init process.

(@daniel-0723 sorry, I have allowed myself to add empty line above your comment because your response merged with the citation)

OK, so we should consider offset address given to flash API as logical, or rather dependent on whether obb/ecc feature of device is enabled or extra bytes are available for user.

@daniel-0723 daniel-0723 force-pushed the macronix_spi_nand_v1 branch 2 times, most recently from e014de8 to c167d73 Compare December 19, 2024 07:23
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@rogeryou Can you please fix the compliance and documentation?

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@rogeryou Can you please fix the compliance and documentation?
OK, we will do the compliance check in local.

@daniel-0723 daniel-0723 force-pushed the macronix_spi_nand_v1 branch 6 times, most recently from 66a06e6 to 9d94e4c Compare January 28, 2025 01:25
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Hi @de-nordic , we have fixed the compliance and documentation, please review again.

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There should be configuration for existing flash tests added, as the driver implements the Flash API and should work with these tests and samples we already have.

Some comments left, still reviewing.

@@ -63,6 +63,8 @@ zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_SMARTBOND flash_smartbond.c)
zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_TELINK_B91 soc_flash_b91.c)
zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_XMC4XXX soc_flash_xmc4xxx.c)
zephyr_library_sources_ifdef(CONFIG_SPI_FLASH_AT45 spi_flash_at45.c)
zephyr_library_sources_ifdef(CONFIG_SPI_NAND bch.c)
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Not to be fixed with this PR, but just want to mention that I will propose enhancement where bch implementation gets moved to CRC subsystem.

@@ -0,0 +1,38 @@
# Copyright (c) 2022 Macronix International Co., Ltd.
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You probably want to update date in copyrights.


menuconfig SPI_NAND
bool "SPI NAND Flash"
select FLASH_HAS_DRIVER_ENABLED
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You are missing FLASH_HAS_EXPLICIT_ERASE

Device is connected to SPI bus, it has to
be initialized after SPI driver.

config SPI_NAND_CS_WAIT_DELAY
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Shouldn't this be defined in DTS for a device?

help
This is the wait delay (in us) to allow for CS switching to take effect

config SPI_NAND_IDLE_IN_DPD
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Shouldn't this be defined in dts?

LOG_ERR("Enable continuous read failed: %d\n", secur_reg);
}

out: release_device(dev);
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Labels alone in the line, drop the function call to the next line.

return ret;
}

static int spi_nand_conti_read_enable(const struct device *dev)
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Can we merge the spi_nand_conti_read_enable and spi_nand_conti_read_disable. They are looking very similar.

size -= chunk;
}

out: release_device(dev);
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Labels get own lines.

offset = addr % data->page_size;
chunk = (offset + size < data->page_size) ?
size : (data->page_size - offset);
read_bytes = chunk;
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Do we need read_bytes; it seem that is equivalent of chunk, through the loop, and not used outside.

goto out;
}

ret = spi_nand_wait_until_ready(dev);
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unchecked ret, static analysis will not be happy.

:name: JEDEC SPI-NAND flash
:relevant-api: flash_interface

Use the flash API to interact with an SPI NOR serial flash memory device.
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Suggested change
Use the flash API to interact with an SPI NOR serial flash memory device.
Use the flash API to interact with an SPI NAND serial flash memory device.

@de-nordic de-nordic assigned de-nordic and unassigned nvlsianpu Feb 27, 2025
@de-nordic de-nordic added this to the v4.2.0 milestone Feb 27, 2025
Add SPI NAND Flash driver support

Signed-off-by: Daniel Zhang <[email protected]>
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