The PL of the KV260 board has no clock directly accessible by the PL. This PCB, fixes that. Few reasons why you would want to use an external clock for the PL, is to avoid using the clock from the PS, which may have too much jitter for certain use cases and requires software configuration through Vitis.
The PCB is installed in the MIPI connector of the board.
The installed PCB should look like the following.
The folder reference_design contains the rtl and constraint reference files to use the clock signal. The design should switch every second.
