Skip to content

Commit 76a069f

Browse files
committed
Merge branch 'spinler-fix-compsynth' into 'devel'
Enable NVC compiler for component elaboration See merge request ndk/ndk-fpga!252
2 parents 743a66d + 2544fd9 commit 76a069f

File tree

40 files changed

+149
-74
lines changed

40 files changed

+149
-74
lines changed

build/Makefile.Quartus.inc

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -89,11 +89,10 @@ clean_build:
8989
*.qpf *.qsf *.qws *.pin *.sld \
9090
*.rpt *.summary *.done
9191
-@$(RM) -r qdb tmp-clearbox
92-
-@$(RM) -r DevTree_paths.txt
93-
-@$(RM) -r $(NETCOPE_TEMP) $(OUTPUT_NAME).quartus.mk $(OUTPUT_NAME).quartus_sh.mk
92+
-@$(RM) -r $(OUTPUT_NAME).quartus.mk $(OUTPUT_NAME).quartus_sh.mk
9493

9594
# User's chance to add own cleaning stuff
96-
clean: clean_build $(CLEAN_DEPENDS)
95+
clean: clean_build clean_common $(CLEAN_DEPENDS)
9796

9897
# User's chance to add own 'hard' cleaning stuff (e.g. removing module checkpoints)
9998
cleanall: clean $(CLEANALL_DEPENDS)

build/Makefile.Synplify.inc

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -82,11 +82,10 @@ endif
8282
clean_build:
8383
-@$(RM) *.edf *.prj stdout.log* synlog.tcl
8484
-@$(RM) -r synth1 rev_1
85-
-@$(RM) -r DevTree_paths.txt
86-
-@$(RM) -r $(NETCOPE_TEMP) $(OUTPUT_NAME).synplify_pro.mk
85+
-@$(RM) -r $(OUTPUT_NAME).synplify_pro.mk
8786

8887
# User's chance to add own cleaning stuff
89-
clean: clean_build $(CLEAN_DEPENDS)
88+
clean: clean_build clean_common $(CLEAN_DEPENDS)
9089

9190
# User's chance to add own 'hard' cleaning stuff (e.g. removing module checkpoints)
9291
cleanall: clean $(CLEANALL_DEPENDS)

build/Makefile.Vivado.inc

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -90,12 +90,10 @@ clean_build:
9090
messages-* *_synth.drc *_par.drc
9191
-@$(RM) -r *.dcp *.prm
9292
-@$(RM) -r *.data *.runs *.cache *.filter *.hw *.sim .Xil *.ip_user_files
93-
-@$(RM) -r vhdocl.doc vhdocl.conf
94-
-@$(RM) -r DevTree_paths.txt
95-
-@$(RM) -r $(NETCOPE_TEMP) $(OUTPUT_NAME).vivado.mk
93+
-@$(RM) -r $(OUTPUT_NAME).vivado.mk
9694

9795
# User's chance to add own cleaning stuff
98-
clean: clean_build $(CLEAN_DEPENDS)
96+
clean: clean_build clean_common $(CLEAN_DEPENDS)
9997

10098
# Clean really everything (e.g. module checkpoints)
10199
cleanall: clean $(CLEANALL_DEPENDS)

build/common.mk

Lines changed: 15 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -8,11 +8,16 @@
88
RM ?= rm -f
99
TCLSH ?= tclsh
1010

11-
.PHONY: simulation vhdocl cocotb
11+
.PHONY: simulation vhdocl cocotb clean_common
1212

13-
GEN_MK_TARGETS += simulation vhdocl cocotb ghdl-sim nvc-sim
13+
GEN_MK_TARGETS += simulation vhdocl cocotb ghdl-sim nvc nvc-sim
1414
simulation: GEN_MK_ENV=SIM_SCRIPT=$(SIM_SCRIPT) SIM_FLAGS=$(SIM_FLAGS)
1515

16+
# INFO: NETCOPE_TEMP is generated directory
17+
clean_common:
18+
-@$(RM) -r nvcwork/ $(NETCOPE_TEMP)
19+
-@$(RM) DevTree_paths.txt vhdocl.doc vhdocl.conf
20+
1621
MAKE_REC = $(MAKE) -f $(firstword $(MAKEFILE_LIST)) --no-print-directory $(NETCOPE_ENV)
1722

1823
define print_label
@@ -72,12 +77,16 @@ ghdl-sim: $(MOD)
7277
MODULE=$(COCOTB_MODULE) TOPLEVEL=$(TOP_LEVEL_ENT_LC) TOPLEVEL_LANG=vhdl $(NETCOPE_ENV) COCOTB_RESOLVE_X=ZEROS \
7378
ghdl -r -v --workdir=$(GHDL_WORK_DIR) -P$(GHDL_WORK_DIR) $(addprefix -P,$(GHDL_LIBS)) $(TOP_LEVEL_ENT_LC) --vpi=$(shell cocotb-config --lib-name-path vpi ghdl) --asserts=disable --vcd=$(OUTPUT_NAME).vcd
7479

75-
nvc-sim: $(MOD)
80+
NVC_LOAD ?=
81+
nvc-sim: NVC_LOAD=--load $(shell cocotb-config --lib-name-path vhpi nvc)
82+
nvc-sim: nvc
83+
84+
nvc: $(MOD)
7685
$(eval TOP_LEVEL_ENT_LC:=$(shell echo $(TOP_LEVEL_ENT) | tr '[:upper:]' '[:lower:]'))
77-
nvc --std=2008 -a --relaxed $(filter %.vhd,$(MOD))
78-
nvc -M 4G -e $(TOP_LEVEL_ENT_LC)
86+
nvc --work=nvcwork -H 1G -M 4G --std=2008 -a --relaxed $(filter %.vhd,$(MOD))
87+
nvc --work=nvcwork -H 1G -M 4G -e $(TOP_LEVEL_ENT_LC)
7988
MODULE=$(COCOTB_MODULE) TOPLEVEL=$(TOP_LEVEL_ENT_LC) TOPLEVEL_LANG=vhdl $(NETCOPE_ENV) COCOTB_RESOLVE_X=ZEROS \
80-
nvc -M 4G -r $(TOP_LEVEL_ENT_LC) --ieee-warnings=off --load $(shell cocotb-config --lib-name-path vhpi nvc)
89+
nvc --work=nvcwork -H 1G -M 4G -r $(TOP_LEVEL_ENT_LC) --ieee-warnings=off $(NVC_LOAD)
8190

8291
else
8392
.PHONY: $(GEN_MK_NAME)

cards/silicom/n6010/src/comp/pmci/synth/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,4 +11,4 @@ DEVICE=AGILEX
1111
.PHONY: all
1212
all: comp
1313

14-
include ../../../../../../../conf/Makefile
14+
include ../../../../../../../build/Makefile

comp/base/fifo/asfifo_bram_datamux/dma_fifo_2to1/Modules.tcl

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5,11 +5,13 @@
55
# SPDX-License-Identifier: BSD-3-Clause
66

77
# Base directories
8-
set ASFIFO_BASE "$OFM_PATH/comp/base/fifo/asfifox"
9-
set PACKAGES "$OFM_PATH/comp/base/pkg/math_pack.vhd"
8+
set ASFIFO_BASE "$OFM_PATH/comp/base/fifo/asfifox"
9+
lappend PACKAGES "$OFM_PATH/comp/base/pkg/math_pack.vhd"
10+
lappend PACKAGES "$OFM_PATH/comp/base/pkg/dma_bus_pack.vhd"
11+
1012
# List of components
1113
set COMPONENTS [list \
12-
[list "ASFIFO" $ASFIFO_BASE "FULL"] \
13-
]
14+
[list "ASFIFO" $ASFIFO_BASE "FULL"] \
15+
]
1416
set MOD "$MOD $ENTITY_BASE/dma_fifo_2to1_ent.vhd"
1517
set MOD "$MOD $ENTITY_BASE/dma_fifo_2to1_arch.vhd"

comp/base/logic/sr_sync_latch/synth/Makefile

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,7 @@
66

77
TOP_LEVEL_ENT=SR_SYNC_LATCH
88

9-
SYNTH=vivado
109
export CLK_PERIOD=2.64
11-
export DEVICE=ULTRASCALE
1210

1311
all: comp
1412
include ../../../../../build/Makefile

comp/base/mem/lvt_mem/Modules.tcl

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,14 +6,15 @@
66

77
set GEN_REG_ARRAY_BASE "$OFM_PATH/comp/base/mem/gen_reg_array"
88
set GEN_LUTRAM_BASE "$OFM_PATH/comp/base/mem/gen_lutram"
9-
set GEN_LUTRAM_BASE "$OFM_PATH/comp/base/mem/sdp_bram"
9+
set GEN_SDP_BRAM_BASE "$OFM_PATH/comp/base/mem/sdp_bram"
1010
set GEN_MUX_BASE "$OFM_PATH/comp/base/logic/mux"
1111

12-
lappend PACKAGES "$OFM_PATH/comp/base/pkg/type_pack.vhd"
1312
lappend PACKAGES "$OFM_PATH/comp/base/pkg/math_pack.vhd"
13+
lappend PACKAGES "$OFM_PATH/comp/base/pkg/type_pack.vhd"
1414

1515
lappend COMPONENTS [list "GEN_REG_ARRAY" $GEN_REG_ARRAY_BASE "FULL"]
1616
lappend COMPONENTS [list "GEN_LUTRAM" $GEN_LUTRAM_BASE "FULL"]
17+
lappend COMPONENTS [list "SDP_BRAM" $GEN_SDP_BRAM_BASE "FULL"]
1718
lappend COMPONENTS [list "GEN_MUX" $GEN_MUX_BASE "FULL"]
1819

1920
lappend MOD "$ENTITY_BASE/lvt_mem.vhd"

comp/base/mem/tcam2/tcam2.vhd

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -124,7 +124,7 @@ architecture FULL of TCAM2 is
124124
signal input_wr_addr_reg : std_logic_vector(WRITE_ADDR'range);
125125

126126
-- Input registers augmented
127-
signal input_m_data_reg_aug : std_logic_vector(COLUMNS*CELL_WIDTH-1 downto 0);
127+
signal input_m_data_reg_aug : std_logic_vector(COLUMNS*CELL_WIDTH-1 downto 0) := (others => '0');
128128
signal input_wr_data_reg_aug : std_logic_vector(COLUMNS*CELL_WIDTH-1 downto 0) := (others => '0');
129129
signal input_wr_mask_reg_aug : std_logic_vector(COLUMNS*CELL_WIDTH-1 downto 0) := (others => '0');
130130

@@ -500,7 +500,7 @@ begin
500500
end process;
501501

502502
-- match data register padding
503-
input_m_data_reg_aug <= (input_m_data_reg'range => input_m_data_reg, others => '0');
503+
input_m_data_reg_aug(input_m_data_reg'range) <= input_m_data_reg;
504504
-- match data register array
505505
input_m_data_reg_aug_arr <= slv_array_deser(input_m_data_reg_aug,COLUMNS);
506506

comp/base/misc/frequency_meter/frequency_meter.vhd

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -289,7 +289,8 @@ begin
289289
interval_len <= resize(unsigned(MI_DWR), INTERVAL_LEN_WIDTH);
290290
end if;
291291
if (MI_RESET = '1') then
292-
interval_len <= (INTERVAL_LEN_WIDTH/2 => '1', others => '0');
292+
interval_len <= (others => '0');
293+
interval_len(INTERVAL_LEN_WIDTH/2) <= '1';
293294
end if;
294295
end if;
295296
end process;

0 commit comments

Comments
 (0)