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perf(profiling): cache lasti→line per way to skip parse_linetable on …#18435

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perf(profiling): cache lasti→line per way to skip parse_linetable on …#18435
vlad-scherbich wants to merge 3 commits into
vlad/profile-collect-tls-batchfrom
vlad/heap-profiler-lineno-cache

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@vlad-scherbich
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…hot allocation sites

Description

Testing

Risks

Additional Notes

@datadog-datadog-prod-us1-2
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datadog-datadog-prod-us1-2 Bot commented Jun 3, 2026

Pipelines  Tests

Fix all issues with BitsAI

⚠️ Warnings

🚦 33 Pipeline jobs failed

Changelog | Validate changelog   View in Datadog   GitHub Actions

See error Release note not found during changelog validation

DataDog/apm-reliability/dd-trace-py | build linux serverless: [amd64, cp315-cp315, v113741238-d2b8243-manylinux2014_x86_64, 1]   View in Datadog   GitLab

See error Dependency manager download failed: 404 Not Found for package 'bytecode==0.18.1'.

DataDog/apm-reliability/dd-trace-py | build linux serverless: [amd64, cp315-cp315, v113741491-d2b8243-musllinux_1_2_x86_64, 1]   View in Datadog   GitLab

See error NotImplementedError: This version of CPython is not supported yet. AssertionError during smoke test execution, DD_IAST_ENABLED=0: 1.

View all 33 failed jobs.

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No other issues found (see more)

🧪 All tests passed
❄️ No new flaky tests detected

🔄 Datadog auto-retried 3 jobs - 0 passed on retry View in Datadog

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@P403n1x87
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Isn't there a frame cache similar to the one used by Echion? 🤔

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cit-pr-commenter-54b7da Bot commented Jun 3, 2026

Codeowners resolved as

ddtrace/profiling/collector/_memalloc_code_cache.cpp                    @DataDog/profiling-python
ddtrace/profiling/collector/_memalloc_code_cache.h                      @DataDog/profiling-python
ddtrace/profiling/collector/_memalloc_tb.cpp                            @DataDog/profiling-python

…ia std::optional

std::optional<CacheHit> is 24B on x86-64, which exceeds the 16B register-return
threshold and forces the compiler to use a hidden pointer and stack copy on every
lookup call. PR2's optional<function_id> was 16B and returned in RAX:RDX. Drop the
optional wrapper and use a sentinel line=-1 for lasti mismatch, keeping
sizeof(CacheHit)=16B and restoring register return.
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