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[WIP] Add Intel Sapphire Rapids support to archdetect #889
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cc2e00f
add Intel Sapphire/Emerald Rapids
bedroge 40e1eac
add Intel Sapphire Rapids to matrix
bedroge 670a87e
files for testing Sapphire Rapids support
bedroge d182f77
rename sapphire_rapids to sapphirerapids
bedroge 9aeb37e
rename sapphire_rapids to sapphirerapids
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@@ -1,7 +1,8 @@ | ||
# x86_64 CPU architecture specifications | ||
# Software path in EESSI | Vendor ID | List of defining CPU features | ||
"x86_64/intel/haswell" "GenuineIntel" "avx2 fma" # Intel Haswell, Broadwell | ||
"x86_64/intel/skylake_avx512" "GenuineIntel" "avx2 fma avx512f avx512bw avx512cd avx512dq avx512vl" # Intel Skylake, Cascade Lake | ||
"x86_64/amd/zen2" "AuthenticAMD" "avx2 fma" # AMD Rome | ||
"x86_64/amd/zen3" "AuthenticAMD" "avx2 fma vaes" # AMD Milan, Milan-X | ||
"x86_64/amd/zen4" "AuthenticAMD" "avx2 fma vaes avx512f avx512ifma" # AMD Genoa, Genoa-X | ||
"x86_64/intel/haswell" "GenuineIntel" "avx2 fma" # Intel Haswell, Broadwell | ||
"x86_64/intel/skylake_avx512" "GenuineIntel" "avx2 fma avx512f avx512bw avx512cd avx512dq avx512vl" # Intel Skylake, Cascade Lake | ||
"x86_64/intel/sapphire_rapids" "GenuineIntel" "avx2 fma avx512f avx512bw avx512cd avx512dq avx512vl avx512_bf16 amx_tile" # Intel Sapphire/Emerald Rapids | ||
"x86_64/amd/zen2" "AuthenticAMD" "avx2 fma" # AMD Rome | ||
"x86_64/amd/zen3" "AuthenticAMD" "avx2 fma vaes" # AMD Milan, Milan-X | ||
"x86_64/amd/zen4" "AuthenticAMD" "avx2 fma vaes avx512f avx512ifma" # AMD Genoa, Genoa-X |
1 change: 1 addition & 0 deletions
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tests/archdetect/x86_64/intel/sapphire_rapids/AWS-Rocky8-8488C.all.output
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x86_64/intel/sapphire_rapids:x86_64/intel/skylake_avx512:x86_64/intel/haswell:x86_64/generic |
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tests/archdetect/x86_64/intel/sapphire_rapids/AWS-Rocky8-8488C.cpuinfo
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processor : 0 | ||
vendor_id : GenuineIntel | ||
cpu family : 6 | ||
model : 143 | ||
model name : Intel(R) Xeon(R) Platinum 8488C | ||
stepping : 8 | ||
microcode : 0x2b000620 | ||
cpu MHz : 2400.000 | ||
cache size : 107520 KB | ||
physical id : 0 | ||
siblings : 16 | ||
core id : 0 | ||
cpu cores : 8 | ||
apicid : 0 | ||
initial apicid : 0 | ||
fpu : yes | ||
fpu_exception : yes | ||
cpuid level : 31 | ||
wp : yes | ||
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ss ht syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq monitor ssse3 fma cx16 pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm 3dnowprefetch invpcid_single ssbd ibrs ibpb stibp ibrs_enhanced fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves avx_vnni avx512_bf16 wbnoinvd ida arat avx512vbmi umip pku ospke waitpkg avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq rdpid cldemote movdiri movdir64b md_clear serialize amx_bf16 avx512_fp16 amx_tile amx_int8 flush_l1d arch_capabilities | ||
bugs : spectre_v1 spectre_v2 spec_store_bypass swapgs eibrs_pbrsb bhi | ||
bogomips : 4800.00 | ||
clflush size : 64 | ||
cache_alignment : 64 | ||
address sizes : 46 bits physical, 48 bits virtual | ||
power management: |
1 change: 1 addition & 0 deletions
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tests/archdetect/x86_64/intel/sapphire_rapids/AWS-Rocky8-8488C.output
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x86_64/intel/sapphire_rapids |
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Do we want to change this to
sapphirerapids
to be consistent with archspec's naming? It would require a symlink (or complete rebuild...) for the already built packages.There was a problem hiding this comment.
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Ugh... No strong preference, I guess.
A rebuild just to remove a
_
is a bit extreme, of course.A symlink is easy, but less clean.
I'm not sure we should 100% stick to the archspec naming, although that does sort of make sense I guess.
In short: ask others for input here ;)
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I think some of our CI will break if the names don't align...but we also need #485 to make sure
archspec
is up to date for architectures