Rev 5.3 Release For CM Quotation#428
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AleksaBjelogrlic merged 65 commits intomasterfrom Jan 23, 2026
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Upped rev number on SCH and PCB
Also changed sch note re: pcie coupling caps
Cleaned up diff pairs in relation to ground stitching, added cutouts under ADC driver QFNs, Moved bottom silkscreen to not overlap with the new ADC driver 10uF decoupling caps
Everything got reset to direct connect so I used a script to find all the footprints I put reliefs on last rev
Some footprints had assembly outline on random user layers
Improves Assembly Drawing Legibility
Also added note to not break tabs on both assembly layers and fab notes
This should prevent LVS from yelling at us
This lets us keep the DRC check enabled without throwing a hundred nuisance warnings
Only ignored tests are now silkscreen related
Just change of footprint filters for heatsink
Merged top and bottom position files Disabled gerber job file generation Directory Changes
Note only timestamps have changed on ERC, DRC, and PCB outputs
Note only timestamps have changed on ERC, DRC, and PCB outputs
Does not include heatsink and has 3d model for ECS_TXO-2016
This also specifies ENIG copper finish as that wasn't mentioned elsewhere
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