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feat: test.py update for debug signals
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Elizabeth-0 committed Jan 23, 2025
1 parent 8330850 commit 341b224
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Showing 2 changed files with 45 additions and 20 deletions.
2 changes: 1 addition & 1 deletion src/tt_um_waves.v
Original file line number Diff line number Diff line change
Expand Up @@ -201,7 +201,7 @@ end
);

// Waveform Output
wire [7:0] wave_out;
wire unused_wave_out = |wave_out; // Ensure wave_out is used somewhere
assign wave_out = selected_wave; // Ensure wave_out is driven
wire [7:0] scaled_wave;

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63 changes: 44 additions & 19 deletions test/test.py
Original file line number Diff line number Diff line change
Expand Up @@ -49,37 +49,62 @@ async def test_uart_waveform(dut):

for cmd, name in wave_commands.items():
await uart_send(dut, ord(cmd))
await ClockCycles(dut.clk, 500) # Increased delay to allow processing
dut._log.info(f"Checking wave_select after {name} command...")
wave_value = dut.wave_select.value
expected_value = list(wave_commands.keys()).index(cmd)
dut._log.info(f"Expected: {expected_value}, Got: {wave_value}")
assert wave_value == expected_value, f"Waveform selection failed for {name}"
await ClockCycles(dut.clk, 500) # Allow processing time

# Observe I2S serial data (uo_out[2]) change
i2s_sd_before = dut.uo_out[2].value
await ClockCycles(dut.clk, 100)
i2s_sd_after = dut.uo_out[2].value

dut._log.info(f"Checking I2S SD signal after {name} command...")
dut._log.info(f"Before: {i2s_sd_before}, After: {i2s_sd_after}")

assert i2s_sd_before != i2s_sd_after, f"I2S SD signal did not change after {name} selection"

# Test UART: Set frequency (sending '0' - '9')
for i in range(10):
await uart_send(dut, ord(str(i)))
await ClockCycles(dut.clk, 500) # Increased delay
freq_value = dut.freq_select.value
dut._log.info(f"Checking freq_select after sending '{i}'...")
dut._log.info(f"Expected: {i}, Got: {freq_value}")
assert freq_value == i, f"Frequency selection failed for {i}"
await ClockCycles(dut.clk, 500) # Allow processing time

# Observe I2S clock (uo_out[0]) toggles
prev_sck = dut.uo_out[0].value
await ClockCycles(dut.clk, 50)
new_sck = dut.uo_out[0].value

dut._log.info(f"Checking I2S SCK signal after frequency '{i}' command...")
dut._log.info(f"Before: {prev_sck}, After: {new_sck}")

assert prev_sck != new_sck, f"I2S SCK signal did not change after setting frequency {i}"

# Test UART: Set white noise ON ('N') and OFF ('F')
await uart_send(dut, ord('N'))
await ClockCycles(dut.clk, 500)
dut._log.info("Checking white_noise_en after enabling...")
dut._log.info(f"Expected: 1, Got: {dut.white_noise_en.value}")
assert dut.white_noise_en.value == 1, "White noise enable failed"

# Observe randomness in I2S serial data (uo_out[2])
i2s_noise_before = dut.uo_out[2].value
await ClockCycles(dut.clk, 50)
i2s_noise_after = dut.uo_out[2].value

dut._log.info("Checking I2S SD signal after enabling white noise...")
dut._log.info(f"Before: {i2s_noise_before}, After: {i2s_noise_after}")

assert i2s_noise_before != i2s_noise_after, "White noise selection failed (I2S SD signal did not change)"

await uart_send(dut, ord('F'))
await ClockCycles(dut.clk, 500)
dut._log.info("Checking white_noise_en after disabling...")
dut._log.info(f"Expected: 0, Got: {dut.white_noise_en.value}")
assert dut.white_noise_en.value == 0, "White noise disable failed"

# Check I2S output
await ClockCycles(dut.clk, 1000) # Extra cycles for stability
# Observe I2S serial data (uo_out[2]) again
i2s_noise_off_before = dut.uo_out[2].value
await ClockCycles(dut.clk, 50)
i2s_noise_off_after = dut.uo_out[2].value

dut._log.info("Checking I2S SD signal after disabling white noise...")
dut._log.info(f"Before: {i2s_noise_off_before}, After: {i2s_noise_off_after}")

assert i2s_noise_off_before != i2s_noise_off_after, "White noise disable failed (I2S SD signal did not change)"

# Check I2S output correctness
await ClockCycles(dut.clk, 1000) # Ensure stability
dut._log.info("Checking I2S outputs...")

sck = dut.uo_out[0].value
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