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Flip back to 250Mhz pru's
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dkulp committed Jan 29, 2025
1 parent 2f9ae9d commit 74d51b1
Showing 1 changed file with 4 additions and 3 deletions.
7 changes: 4 additions & 3 deletions src/pru/FalconPRUDefs.hp
Original file line number Diff line number Diff line change
Expand Up @@ -103,9 +103,10 @@
// Address for the Constant table Programmable Pointer Register 1(CTPPR_1)
#define CTPPR_1 0x2202C


#define NSPERCLK 3
#define NS2CLK(ns) ((ns) / 3)
// For now, we run the AM62x PRU's at 250Mhz because DDR latency is too
// high when running at 333Mhz. Issue is known at TI, no solution yet.
#define NSPERCLK 4
#define NS2CLK(ns) ((ns) / 4)

#define SHM_SIZE (32 * 1024)

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