new_dynarec: fix invalid CPU instruction generation in emit_writeword()

Rosalie241 · May 8, 2024 · 4eb7ab0 · 4eb7ab0
1 parent 80e4faf
commit 4eb7ab0
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Showing 3 changed files with 3 additions and 0 deletions.
diff --git a/Source/3rdParty/mupen64plus-core/src/device/r4300/new_dynarec/arm/assem_arm.c b/Source/3rdParty/mupen64plus-core/src/device/r4300/new_dynarec/arm/assem_arm.c
@@ -2040,6 +2040,7 @@ static void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map)
 }
 static void emit_writeword(int rt, int addr)
 {
+  if(rt<0) return;
   u_int offset = addr-(u_int)&g_dev.r4300.new_dynarec_hot_state;
   assert(offset<4096);
   assem_debug("str %s,fp+%d",regname[rt],offset);

diff --git a/Source/3rdParty/mupen64plus-core/src/device/r4300/new_dynarec/arm64/assem_arm64.c b/Source/3rdParty/mupen64plus-core/src/device/r4300/new_dynarec/arm64/assem_arm64.c
@@ -2393,6 +2393,7 @@ static void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map)
 
 static void emit_writeword(int rt, intptr_t addr)
 {
+  if(rt<0) return;
   intptr_t offset = addr-(intptr_t)&g_dev.r4300.new_dynarec_hot_state;
   assert(offset<16380LL);
   assert(offset%4 == 0); /* 4 bytes aligned */

diff --git a/Source/3rdParty/mupen64plus-core/src/device/r4300/new_dynarec/x64/assem_x64.c b/Source/3rdParty/mupen64plus-core/src/device/r4300/new_dynarec/x64/assem_x64.c
@@ -2309,6 +2309,7 @@ static void emit_xchg64(int rs, int rt)
 }
 static void emit_writeword(int rt, intptr_t addr)
 {
+  if(rt<0) return;
   assert((intptr_t)addr-(intptr_t)out>=-2147483648LL&&(intptr_t)addr-(intptr_t)out<2147483647LL);
   assem_debug("movl %%%s,%llx",regname[rt],addr);
   output_byte(0x89);