Skip to content

Commit

Permalink
Fixed Typo
Browse files Browse the repository at this point in the history
  • Loading branch information
@ThreepwoodLeBrush
ThreepwoodLeBrush committed Dec 15, 2024
1 parent 5d2cad5 commit 3d87c10
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion names.csv
View file
Original file line number Diff line number Diff line change
Expand Up @@ -181,7 +181,7 @@ SuperJacob ;Super Jacob ;SuperJacob:1
| | | | | | | | | | | | | | | | | | | | | | | | | | |
ADCTest ;ADC Input Test ;ADCTest:18_Common_EU ;ADCTest:18_Common_EU ;ADCTest:18_Common_EU ;ADCTest:18_Common_EU ;ADCTest:18_Common_EU ;ADC Input and Signal Test ;ADCTest:28_Common_EU ;ADCTest:28_Common_EU ;ADCTest:28_Common_EU ;ADCTest:28_Common_EU ;ADCTest:28_Common_EU ;ADCTest:28_Common_EU
InputTest ;Input Test ;InputTest:18_Common_EU ;InputTest:18_Common_EU ;InputTest:18_Common_EU ;InputTest:18_Common_EU ;InputTest:18_Common_EU ;Controller Input Tester ;InputTest:28_Common_EU ;InputTest:28_Common_EU ;InputTest:28_Common_EU ;InputTest:28_Common_EU ;InputTest:28_Common_EU ;InputTest:28_Common_EU
InputTest_Sinden ;Input Test (S) ;InputTest:18_Common_EU ;InputTest_Sinden:18_Common_JP ;InputTest_Sinden:18_Common_JP ;InputTest_Sinden:18_Common_JP ;InputTest_Sinden:18_Common_JP ;Controller Input Tester ;InputTest:28_Common_EU ;InputTest_Sinden:28_Common_JP ;InputTest_Sinden:28_Common_JP ;InputTest_Sinden:28_Common_JP ;InputTest_Sinden:28_Common_JP ;InputTest_Sinden:28_Common_JP
InputTest_Sinden ;Input Test (S) ;InputTest_Sinden:18_Common_EU ;InputTest_Sinden:18_Common_JP ;InputTest_Sinden:18_Common_JP ;InputTest_Sinden:18_Common_JP ;InputTest_Sinden:18_Common_JP ;Controller Input Tester ;InputTest_Sinden:28_Common_EU ;InputTest_Sinden:28_Common_JP ;InputTest_Sinden:28_Common_JP ;InputTest_Sinden:28_Common_JP ;InputTest_Sinden:28_Common_JP ;InputTest_Sinden:28_Common_JP
jtsdram48 ;SDRAM Test 48 MHz ;jtsdram48:18_Common_EU ;jtsdram48:18_Common_EU ;jtsdram48:18_Common_EU ;jtsdram48:18_Common_EU ;jtsdram48:18_Common_EU ;jtsdram48:18_Common_EU ;jtsdram48:18_Common_EU ;jtsdram48:18_Common_EU ;Jotego SDRAM Test 48 MHz ;jtsdram48:28_Manufacturer_EU ;jtsdram48:28_Manufacturer_EU ;jtsdram48:28_Manufacturer_EU
jtsdram96 ;SDRAM Test 96 MHz ;jtsdram96:18_Common_EU ;jtsdram96:18_Common_EU ;jtsdram96:18_Common_EU ;jtsdram96:18_Common_EU ;jtsdram96:18_Common_EU ;jtsdram96:18_Common_EU ;jtsdram96:18_Common_EU ;jtsdram96:18_Common_EU ;Jotego SDRAM Test 96 MHz ;jtsdram96:28_Manufacturer_EU ;jtsdram96:28_Manufacturer_EU ;jtsdram96:28_Manufacturer_EU
memtest ;SDRAM Test ;memtest:18_Common_EU ;memtest:18_Common_EU ;memtest:18_Common_EU ;memtest:18_Common_EU ;memtest:18_Common_EU ;memtest:18_Common_EU ;memtest:18_Common_EU ;memtest:18_Common_EU ;memtest:18_Common_EU ;memtest:18_Common_EU ;memtest:18_Common_EU ;memtest:18_Common_EU
Expand Down

0 comments on commit 3d87c10

Please sign in to comment.