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FEAT: Draft_filtersolutions #4745

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dceedc6
feat/filtersolutions: ignore changes to pyaedtenv
ramin4667 May 15, 2024
d1647cf
FEAT Draft FilterSolutions feature: Test folde is updated
ramin4667 May 15, 2024
dc95a1a
feat/pre-commit run
ramin4667 May 15, 2024
faccea3
feat/changed folder to pyaedt
ramin4667 May 17, 2024
066cbff
feat/draft_filtersolutions: Docstring terms are updated
ramin4667 May 27, 2024
18a79b9
feat/draft_filtersolutions: example updated.
ramin4667 May 30, 2024
24cb54d
feat/draft_filtersolutions: Test skip for current release
ramin4667 May 31, 2024
2219c15
feat/draft_filtersolutions: docstring error is fixed.
ramin4667 May 31, 2024
1bd7fe2
feat/draft_filtersolutions: comments are applied, delay filter is add…
ramin4667 Jun 3, 2024
9c0d78e
feat/draft_filtersolutions: Reviewer comments are applied.
ramin4667 Jun 10, 2024
fa86310
feat/draft_filtersolutions: gitignore file is updated
ramin4667 Jun 10, 2024
793ec06
Merge branch 'main' into feat/draft_filtersolutions
Samuelopez-ansys Jun 11, 2024
374d806
Merge branch 'main' into feat/draft_filtersolutions
ramin4667 Jun 11, 2024
bad5160
feat/draft_filtersolutions: Test class is added.
ramin4667 Jun 11, 2024
c759f6f
Merge branch 'main' into feat/draft_filtersolutions
ramin4667 Jun 11, 2024
84e9371
Merge branch 'feat/draft_filtersolutions' of https://github.com/ansys…
ramin4667 Jun 11, 2024
c32e25c
feat/draft_filtersolutions: resource file name changed
ramin4667 Jun 11, 2024
706ac22
Merge branch 'main' into feat/draft_filtersolutions
ramin4667 Jun 12, 2024
8a3e3da
Merge branch 'main' into feat/draft_filtersolutions
ramin4667 Jun 19, 2024
d1ab441
[pre-commit.ci] auto fixes from pre-commit.com hooks
pre-commit-ci[bot] Jun 19, 2024
e8f80a7
feat/draft_filtersolutions: diplexer parameters and version added.
ramin4667 Jun 20, 2024
3648fe5
feat/draft_filtersolutions: added diplexer parameters are reverted
ramin4667 Jun 21, 2024
66dd570
Merge branch 'main' into feat/draft_filtersolutions
ramin4667 Jun 21, 2024
018b40b
feat/draft_filtersolutions: comments are applied.
ramin4667 Jun 27, 2024
23513f5
Merge branch 'feat/draft_filtersolutions' of https://github.com/ansys…
ramin4667 Jun 27, 2024
2c223b3
Merge branch 'main' into feat/draft_filtersolutions
ramin4667 Jun 27, 2024
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23 changes: 23 additions & 0 deletions _unittest/test_45_FilterSolutions/__init__.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
# -*- coding: utf-8 -*-
#
# Copyright (C) 2021 - 2024 ANSYS, Inc. and/or its affiliates.
# SPDX-License-Identifier: MIT
#
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in all
# copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
25 changes: 25 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/__init__.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
# -*- coding: utf-8 -*-
#
# Copyright (C) 2021 - 2024 ANSYS, Inc. and/or its affiliates.
# SPDX-License-Identifier: MIT
#
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in all
# copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.

from .resources import read_resource_file
27 changes: 27 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/bridge_t.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
*
* Dummy Resistors Required For Spice
* Have Been Added to Net List.
*
C2 2 3 7.12E-12
C3 3 0 3.873E-12
C4 3 4 1.233E-11
Rq4 3 4 5E+10
L1 2 4 4.424E-09
C6 4 5 3.916E-12
Rq6 4 5 5E+10
C7 5 0 9.429E-12
C8 5 6 4.684E-12
Rq8 5 6 5E+10
L5 4 6 8.388E-09
R9 6 0 50
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(6) -70 0
.PLOT AC VP(6) -200 200
.PLOT AC VG(6) 0 2.5E-09
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(6) 0 0.6
.END
33 changes: 33 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/bridge_t_high.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,33 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
L2 2 3 8.17E-09
L3 3 4 8.595E-09
C3 4 0 2.366E-12
L4 3 5 8.123E-09
L5 5 6 4.129E-09
C5 6 0 2.523E-12
L6 5 7 1.459E-09
R7 7 0 50
C9 2 8 7.438E-13
L10 8 0 1.071E-08
C11 8 9 1.496E-12
C8 2 9 1.574E-12
C13 9 10 1.287E-12
L14 10 0 1.004E-08
C15 10 11 3.582E-12
C12 9 11 3.642E-12
R16 11 0 50
*
* Compensation Elements
*
L1 2 12 2.28E-07
C1 12 0 1.111E-13
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(7) VDB(11) -200 0
.PLOT AC VP(7) VP(11) -200 200
.PLOT AC VG(7) VG(11) 0 1.8E-08
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(7) V(11) -0.2 0.7
.END
39 changes: 39 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/bridge_t_low.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,39 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
L3 2 3 3.406E-08
C4 3 0 2.366E-12
L5 3 4 1.693E-08
L2 2 4 1.609E-08
L7 4 5 1.969E-08
C8 5 0 2.523E-12
L9 5 6 7.071E-09
L6 4 6 6.955E-09
R10 6 0 50
*
* Dummy Resistors Required For Spice
* Have Been Added to Net List.
*
C11 2 7 3.1E-12
L12 7 8 1.071E-08
C12 8 0 2.947E-12
C13 7 9 3.118E-12
Rq13 7 9 5E+10
L14 9 10 1.004E-08
C14 10 0 6.135E-12
C15 9 11 1.736E-11
Rq15 9 11 5E+10
R16 11 0 50
*
* Compensation Elements
*
L1 2 12 2.28E-07
C1 12 0 1.111E-13
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(6) VDB(11) -200 0
.PLOT AC VP(6) VP(11) -200 200
.PLOT AC VG(6) VG(11) 0 1.8E-08
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(6) V(11) -0.2 0.7
.END
23 changes: 23 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/c_lead_inductor.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
Ln1C1 2 2517 1E-09
C1 2517 2519 1.967E-12
Ln2C1 2519 0 1E-09
L2 2 3 1.288E-08
Ln1C3 3 3517 1E-09
C3 3517 3519 6.366E-12
Ln2C3 3519 0 1E-09
L4 3 4 1.288E-08
Ln1C5 4 4517 1E-09
C5 4517 4519 1.967E-12
Ln2C5 4519 0 1E-09
R6 4 0 50
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(4) -140 0
.PLOT AC VP(4) -200 200
.PLOT AC VG(4) 0 1.2E-09
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(4) -0.1 0.6
.END
20 changes: 20 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/c_node_capacitor.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
Cn1C1 2 0 1E-09
C1 2 0 1.967E-12
L2 2 3 1.288E-08
Cn1C3 3 0 1E-09
C3 3 0 6.366E-12
L4 3 4 1.288E-08
Cn1C5 4 0 1E-09
C5 4 0 1.967E-12
R6 4 0 50
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(4) -200 -50
.PLOT AC VP(4) -90 0
.PLOT AC VG(4) 0 3E-11
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(4) -0.1 0.6
.END
17 changes: 17 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/c_node_compensate.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
C1 2 0 1.967E-12
L2 2 3 1.288E-08
C3 3 0 6.366E-12
L4 3 4 1.288E-08
C5 4 0 1.967E-12
R6 4 0 50
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(4) -80 0
.PLOT AC VP(4) -200 200
.PLOT AC VG(4) 0 9E-10
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(4) 0 0.6
.END
20 changes: 20 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/capacitor_ls.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
C1 2 3 1.967E-12
LXcs1 3 0 1E-09
L2 2 4 1.288E-08
C3 4 5 6.366E-12
LXcs3 5 0 1E-09
L4 4 6 1.288E-08
C5 6 7 1.967E-12
LXcs5 7 0 1E-09
R6 6 0 50
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(6) -160 0
.PLOT AC VP(6) -200 200
.PLOT AC VG(6) 0 1E-09
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(6) 0 0.6
.END
20 changes: 20 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/capacitor_q.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
C1 2 0 1.967E-12
Rq1 2 0 8090
L2 2 3 1.288E-08
C3 3 0 6.366E-12
Rq3 3 0 2500
L4 3 4 1.288E-08
C5 4 0 1.967E-12
Rq5 4 0 8090
R6 4 0 50
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(4) -80 0
.PLOT AC VP(4) -200 200
.PLOT AC VG(4) 0 9E-10
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(4) 0 0.6
.END
20 changes: 20 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/capacitor_rp.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
C1 2 0 1.967E-12
Rp1 2 0 1000
L2 2 3 1.288E-08
C3 3 0 6.366E-12
Rp3 3 0 1000
L4 3 4 1.288E-08
C5 4 0 1.967E-12
Rp5 4 0 1000
R6 4 0 50
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(4) -80 0
.PLOT AC VP(4) -200 200
.PLOT AC VG(4) 0 9E-10
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(4) 0 0.6
.END
20 changes: 20 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/capacitor_rs.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
C1 2 3 1.967E-12
Rs1 3 0 1
L2 2 4 1.288E-08
C3 4 5 6.366E-12
Rs3 5 0 1
L4 4 6 1.288E-08
C5 6 7 1.967E-12
Rs5 7 0 1
R6 6 0 50
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(6) -80 0
.PLOT AC VP(6) -200 200
.PLOT AC VG(6) 0 8E-10
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(6) 0 0.6
.END
17 changes: 17 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/complex.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 {TABLE(F, 1E+08, 1, 1E+09, 1, 1E+10, 1) + J*TABLE(F, 1E+08, 0, 1E+09, 0, 1E+10, 0)}
C1 2 0 9.836E-11
L2 2 3 2.575E-10
C3 3 0 3.183E-10
L4 3 4 2.575E-10
C5 4 0 9.836E-11
R6 4 0 {TABLE(F, 1E+08, 1, 1E+09, 1, 1E+10, 1) + J*TABLE(F, 1E+08, 0, 1E+09, 0, 1E+10, 0)}
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(4) -80 0
.PLOT AC VP(4) -200 200
.PLOT AC VG(4) 0 9E-10
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(4) 0 0.6
.END
17 changes: 17 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/current_source.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
*
I1 1 0 AC 1 PULSE 0 0.04 0 1.592E-13 0
R0 1 0 50
C1 1 0 1.967E-12
L2 1 2 1.288E-08
C3 2 0 6.366E-12
L4 2 3 1.288E-08
C5 3 0 1.967E-12
R6 3 0 50
*
.AC DEC 200 2E+08 5E+09
.PLOT AC IDB(R6) -80 0
.PLOT AC IP(R6) -200 200
.PLOT AC VG(R6) 0 9E-10
.TRAN 5E-11 1E-08 0
.PLOT TRAN I(R6) 0 0.6
.END
42 changes: 42 additions & 0 deletions _unittest/test_45_FilterSolutions/resources/diplexer1_bp_1.ckt
Original file line number Diff line number Diff line change
@@ -0,0 +1,42 @@
*
V1 1 0 AC 1 PULSE 0 1 0 1.592E-13 0
R0 1 2 50
L2 2 3 3.173E-08
C2 3 0 1.017E-11
C3 2 4 2.697E-12
L4 4 5 2.505E-08
L5 5 0 6.149E-09
C6 5 0 1.099E-11
C7 5 6 3.016E-12
L8 6 7 2.241E-08
L9 7 0 1.165E-08
C10 7 0 5.801E-12
C11 7 8 1.349E-11
L12 8 9 5.011E-09
R13 9 0 50
L14 2 10 2.492E-09
C14 10 0 7.983E-13
C15 2 11 1.011E-12
L16 11 12 9.391E-09
L17 12 0 2.305E-09
C18 12 0 4.12E-12
C19 12 13 1.13E-12
L20 13 14 8.4E-09
L21 14 0 4.366E-09
C22 14 0 2.175E-12
C23 14 15 5.055E-12
L24 15 16 1.878E-09
R25 16 0 50
*
* Compensation Elements
*
L1 2 17 8.356E-08
C1 17 0 3.031E-13
*
.AC DEC 200 2E+08 5E+09
.PLOT AC VDB(9) VDB(16) -200 0
.PLOT AC VP(9) VP(16) -200 200
.PLOT AC VG(9) VG(16) -1E-09 7E-09
.TRAN 5E-11 1E-08 0
.PLOT TRAN V(9) V(16) -0.2 0.7
.END
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