Apply change request by Martijn

bittide · Feb 7, 2025 · 709c374 · 709c374
1 parent 989b79a
commit 709c374
Showing 1 changed file with 21 additions and 20 deletions.
diff --git a/bittide/src/Bittide/SwitchDemoProcessingElement.hs b/bittide/src/Bittide/SwitchDemoProcessingElement.hs
@@ -24,12 +24,12 @@ switchDemoPe ::
   Signal dom (Maybe (BitVector 96)) ->
   -- | When to read from the crossbar link
   Signal dom (Unsigned 64) ->
-  -- | How many cycles to read from crossbar link
-  Signal dom (Index (nodes * 3)) ->
+  -- | How many tri-cycles to read from the crossbar link
+  Signal dom (Index (nodes)) ->
   -- | When to write to the crossbar link
   Signal dom (Unsigned 64) ->
-  -- | How many cycles to read from crossbar link
-  Signal dom (Index (nodes * 3)) ->
+  -- | How many tri-cycles to write to the crossbar link. Includes writing \"own\" data
+  Signal dom (Index (nodes)) ->
   ( -- \| Outgoing crossbar link
     Signal dom (BitVector 64)
   , -- \| Buffer output
@@ -39,9 +39,9 @@ switchDemoPe SNat localCounter linkIn maybeDna readStart readCycles writeStart w
   (linkOut, buffer)
  where
   readStartLocked = regEn maxBound (peState .==. pure Idle) readStart
-  readCyclesLocked = regEn maxBound (peState .==. pure Idle) readCycles
+  readCyclesLocked = regEn maxBound (peState .==. pure Idle) ((*3) zeroExtend <$> readCycles)
   writeStartLocked = regEn maxBound (peState .==. pure Idle) writeStart
-  writeCyclesLocked = regEn maxBound (peState .==. pure Idle) writeCycles
+  writeCyclesLocked = regEn maxBound (peState .==. pure Idle) ((*3) zeroExtend <$> writeCycles)
 
   localData :: Signal dom (Vec 3 (BitVector 64))
   localData = bundle (unbundle dnaVec :< (pack <$> localCounter))
@@ -83,17 +83,16 @@ switchDemoPe SNat localCounter linkIn maybeDna readStart readCycles writeStart w
       go (Read x) = (== x) <$> indicesI
       go _ = repeat False
 
+  prevPeState = register Idle peState
+
   peState =
-    register
-      Idle
-      ( update
-          <$> localCounter
-          <*> readStartLocked
-          <*> readCyclesLocked
-          <*> writeStartLocked
-          <*> writeCyclesLocked
-          <*> peState
-      )
+      update
+        <$> localCounter
+        <*> readStartLocked
+        <*> readCyclesLocked
+        <*> writeStartLocked
+        <*> writeCyclesLocked
+        <*> prevPeState
    where
     update ::
       -- \| Local clock cycle counter
@@ -110,16 +109,18 @@ switchDemoPe SNat localCounter linkIn maybeDna readStart readCycles writeStart w
       SimplePeState nodes
     update cntr rs rc ws wc state =
       case state of
-        Idle
-          | cntr == rs -> Read 0
-          | cntr == ws -> Write 0
-          | otherwise -> Idle
+        Idle -> nextState
         Read x
           | x == (rc - 1) -> Idle
           | otherwise -> Read (satSucc SatBound x)
         Write x
           | x == (wc - 1) -> Idle
           | otherwise -> Write (satSucc SatBound x)
+     where
+      nextState
+        | cntr == ws && wc > 0 = Write 0
+        | cntr == rs && rc > 0 = Read 0
+        | otherwise = Idle
 
 data SimplePeState nodes
   = Idle