Add MRAC (Memory Region Access Control) emulation

[iyernaveenr]

Add MRAC (Memory Region Access Control) emulation

Implements MRAC CSR (0x7C0) support in the VeeR EL2 emulator, as described in the VeeR EL2 spec.

What this does

The 32-bit address space is split into 16 fixed 256MB regions, each with 2 control bits in the MRAC CSR:

• Cacheable (bit Y*2): idempotent region. Reads are widened to 64-bit aligned double-word (two 32-bit reads on the delegate bus).
• Side-effect (bit Y*2+1): non-idempotent region. Only word-aligned word-sized accesses are allowed. Misaligned or sub-word accesses return LoadAddrMisaligned/StoreAddrMisaligned.
• Both bits set (11): illegal, silently mapped to side-effect only (10) on CSR write.

Implementation

1. MracBus<TBus: Bus> wrapper in sw-emulator/lib/bus/src/mrac_bus.rs that intercepts reads/writes and enforces the region access rules before delegating to the inner bus.

2. MRAC CSR (0x7C0) added to CsrFile with a shared Rc<Cell<u32>> that syncs CSR writes to the bus wrapper.

3. --mrac CLI flag on the emulator binary. When enabled, MRAC enforcement is active. When disabled (default), all accesses pass through unchanged.

Why this matters

Without MRAC enforcement, the emulator does not detect access pattern bugs that would fail on real hardware. For example, reading a mailbox register at offset 4 in a non-side-effect region triggers a widened 64-bit read that also reads the adjacent lock register at offset 0 -- silently acquiring the lock. The side-effect flag prevents this by restricting reads to the exact requested address.

hw-model integration

The hw-model (model_emulated.rs) is also wrapped in MracBus, but with enforcement disabled by default. This allows the infrastructure to be in place for future enabling. When enabled (MracBus::new(..., true)), 4 out of 30 hw-model tests fail due to mailbox access patterns that do not set the MRAC side-effect flag -- confirming that MRAC enforcement catches real access bugs. Enabling by default requires firmware/test updates to configure MRAC CSR correctly.

Tests

9 unit tests covering:

• Side-effect region: byte/halfword/misaligned rejected, word-aligned accepted
• Cacheable region: reads widened to 64-bit double-word
• Disabled passthrough, no-flags passthrough
• Mailbox lock: cacheable region causes spurious lock acquisition
• Mailbox lock: side-effect region prevents spurious lock acquisition

Files changed

• sw-emulator/lib/bus/src/mrac_bus.rs - new MracBus wrapper + 9 unit tests
• sw-emulator/lib/bus/src/lib.rs - added mrac_bus module + export
• sw-emulator/lib/cpu/src/csr_file.rs - added MRAC CSR (0x7C0)
• sw-emulator/lib/cpu/src/cpu.rs - added mrac param to Cpu::new
• sw-emulator/app/src/main.rs - --mrac CLI flag, MracBus wrapping
• sw-emulator/app/src/gdb/gdb_target.rs - updated Cpu type
• sw-emulator/compliance-test/src/main.rs - updated Cpu::new calls
• sw-emulator/lib/cpu/src/instr/test_macros.rs - updated Cpu::new calls
• hw-model/src/model_emulated.rs - wrapped in MracBus (disabled by default), updated all bus access paths

Closes #3601