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2 parents 76c065e + 1a370f3 commit 88a0e54Copy full SHA for 88a0e54
CHANGELOG
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+# EBMC 5.3
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+
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+* SystemVerilog: fix for nets implicitly declared for port connections
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+* SystemVerilog: $typename
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+* SystemVerilog: SVA [*n]
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+* Verilog: allow indexed part select
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+* word-level BMC: fix for F/s_eventually and U/s_until
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+* IC3: liveness to safety translation
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# EBMC 5.2
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* SystemVerilog: defines can now be set on the command line
src/ebmc/ebmc_version.h
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-#define EBMC_VERSION "5.2"
+#define EBMC_VERSION "5.3"
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